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5,108 Commits 29 Branches 10 Tags 19 MiB
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8 Commits

Author SHA1 Message Date
myrtle 10c5997007
xilinx: Improve LUT/CARRY->FF packing (#1683) 
Signed-off-by: gatecat <gatecat@ds0.me>
 2026-04-01 11:22:00 +02:00
gatecat fcc1a33f75 xilinx: Derive clock constraints through PLLs 
Signed-off-by: gatecat <gatecat@ds0.me>
 2026-03-24 14:08:37 +01:00
Miodrag Milanović 9ccd132437
himbaechel: add uarch specific options parsing (#1582) 
* himbaechel: add uarch specific options parsing

* fix tests

* add reference to additional help

* review comments addressed

* cleanup and unify other uarch

* Adressed PR comments
 2025-10-21 14:41:53 +02:00
gatecat 1cd1e4a8d9 xilinx: Fix packing of weird mux trees 
Signed-off-by: gatecat <gatecat@ds0.me>
 2025-06-25 12:38:11 +02:00
gatecat 1967db170d xilinx: Support for complex IOLOGIC 
Signed-off-by: gatecat <gatecat@ds0.me>
 2024-09-27 17:37:46 +02:00
gatecat 24fc33c014 xilinx: Basic I/ODDR support 
Signed-off-by: gatecat <gatecat@ds0.me>
 2024-09-27 17:09:15 +02:00
Adrien Prost-Boucle db0c99199e Himbaechel xilinx : Add support of DSP packing for 7-series 2024-09-24 12:06:56 +02:00
gatecat 5bfe0dd1b1 himbaechel: Adding a xilinx uarch for xc7 with prjxray 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-11-14 17:12:09 +01:00