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169 Commits

Author SHA1 Message Date
gatecat 226a2dfdb4 clangformat 
Signed-off-by: gatecat <gatecat@ds0.me>
 2025-05-20 13:19:52 +02:00
Dave Anderson 182b77a2e8
ecp5: fix frequency constraint on bypassed PLL outputs (#1475) 
Each PLL output in ECP5 can be bypassed, which turns it into a wire
that passes through ICLK unmodified. When an outputs mux is set to
REFCLK, disregard other PLL configuration and copy the input constraint
over unchanged.
 2025-05-06 15:55:38 +02:00
gatecat ede78f3730 ecp5: Fix constant and inverted CEMUX 
Signed-off-by: gatecat <gatecat@ds0.me>
 2025-01-27 11:46:25 +01:00
gatecat 9b51c6e337 clangformat 
Signed-off-by: gatecat <gatecat@ds0.me>
 2024-09-30 14:51:33 +02:00
gatecat 4a4025192a run clangformat 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-12-26 09:54:34 +01:00
laanwj a32ad13a86 ecp5: Don't segfault while packing FFs when DI port of TRELLIS_FF unconnected 
Currently a segfault happens when the DI port is not specified. Leaving
it unconnected is probably incorrect, but it shouldn't crash the placer.
Fix by adding a check.
 2023-11-14 11:55:51 +01:00
gatecat 79c6840fef ecp5: Improve packer robustness to FF dangling M input 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-09-02 11:38:20 +02:00
Miodrag Milanovic 5497a37de1 VLO,VHI support for ECP5 2023-08-29 10:05:30 +02:00
gatecat 7557d33dc6 ecp5: Fix invalid accesses during certain IO packing cases 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-04-12 06:56:59 +02:00
gatecat 39b6584274 clangformat 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-03-16 11:27:08 +01:00
myrtle b5125aac31
Merge pull request #1090 from rowanG077/ecp5-propagate-dcsc-clk-ct 
ecp5: Propagate clock constraints through DCSC
 2023-02-13 10:25:07 +01:00
gatecat a8a88d4813 ecp5: Handle the case where both CE are the same constant 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-02-09 11:12:15 +01:00
rowanG077 9e8f8b7b45 streamline constant_net detection 2023-02-06 17:05:28 +01:00
rowanG077 d2bf44ba45 ecp5: DSCS clock propagation if modesel is 0 constant 2023-02-06 16:27:45 +01:00
rowanG077 a38ee0786a ecp5: Propagate clock constraints through DSCS 2023-02-01 19:12:10 +01:00
gatecat c8cb063656 ecp5: Improve IOFF CE handling robustness 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-01-25 09:26:12 +01:00
Miodrag Milanovic bd628ce591 Remove deprecated functions 2022-12-22 15:26:39 +01:00
gatecat c60fb94b6c refactor: Use IdString::in instead of || chains 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-08-10 18:58:22 +01:00
gatecat 77c82b0fbf refactor: id(stringf(...)) to new idf(...) helper 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-08-10 10:57:46 +01:00
gatecat efb58711b0 ecp5: Split the SLICE bel into separate LUT/FF/RAMW bels 2022-04-07 18:02:36 +01:00
gatecat 2635bab2f1 ecp5: Fix double-counting of FFs in report 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-03-16 15:44:45 +00:00
gatecat 0a70b9c992
Merge pull request #925 from YosysHQ/gatecat/netlist-iv 
Switch to potentially-sparse net users array
 2022-03-01 16:38:48 +00:00
gatecat 9b3e687eda ecp5: Fix PDPW16K clock param renaming 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-02-28 13:10:00 +00:00
gatecat 86699b42f6 Switch to potentially-sparse net users array 
This uses a new data structure for net.users that allows gaps, so
removing a port from a net is no longer an O(n) operation on the number
of users the net has.

Signed-off-by: gatecat <gatecat@ds0.me>
 2022-02-27 13:47:05 +00:00
gatecat 6a32aca4ac refactor: New member functions to replace design_utils 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-02-18 11:13:18 +00:00
gatecat 76683a1e3c refactor: Use constids instead of id("..") 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-02-16 17:09:54 +00:00
gatecat 30fd86ce69 refactor: New NetInfo and CellInfo constructors 2022-02-16 15:10:57 +00:00
gatecat f36188f2e1 ecp5: LUT permutation support 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-12-13 20:22:06 +00:00
gatecat ce030a474c ecp5: Fix packing of IOFF with IODELAYs 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-11-05 15:16:43 +00:00
YRabbit ddc368f0dd Fix mistype. 
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
 2021-09-29 14:21:06 +10:00
gatecat e15f0db408 clangformat 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-08-24 12:48:08 +01:00
Aidan Klein e6006805ce Make EXTREFB handling more robust 
Avoids a segfault if an EXTREFB does not connect directly to its associated DCUA.
Also adds location constraints specifically for EXTREFB.
 2021-08-18 20:49:55 -04:00
gatecat 5482b9a0c6 ecp5: Copy REGMODE in PDP mode to both A and B ports 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-08-02 20:58:45 +01:00
gatecat 2ffb081442 Fixing old emails and names in copyrights 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-06-12 13:22:38 +01:00
gatecat ecc19c2c08 Using hashlib in arches 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-06-02 15:05:19 +01:00
gatecat 579b98c596 Use hashlib for core netlist structures 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-06-02 14:27:56 +01:00
gatecat c82df9e40d ecp5: Use new cluster API 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-05-06 11:59:58 +01:00
gatecat 4bdf4582f0 clangformat 
Signed-off-by: gatecat <gatecat@ds0.me>
 2021-04-30 18:38:30 +01:00
Adam Greig b6c608e038
Add check_alu to Ecp5Packer 
Checks that every ALU54B is correctly connected to two MULT18X18Ds:

* SIGNEDIA and SIGNEDIB connected to SIGNEDP
* MA and MB connected to P
* A and B connected to {ROA, ROB}

Diamond enforces these requirements; the connections are fixed
in any event so no other connection is possible.
 2021-04-29 02:23:44 +01:00
Adam Greig d4c688297c
Add relative constraints to position MULT18X18D near connected ALU54B. 2021-04-29 02:23:43 +01:00
gatecat 7922b3bfc4 Replace DelayInfo with DelayPair/DelayQuad 
This replaces the arch-specific DelayInfo structure with new DelayPair
(min/max only) and DelayQuad (min/max for both rise and fall) structures
that form part of common code.

This further reduces the amount of arch-specific code; and also provides
useful data structures for timing analysis which will need to delay
with pairs/quads of delays as it is improved.

While there may be a small performance cost to arches that didn't
separate the rise/fall cases (arches that aren't currently separating
the min/max cases just need to be fixed...) in DelayInfo, my expectation
is that inlining will mean this doesn't make much difference.

Signed-off-by: gatecat <gatecat@ds0.me>
 2021-02-19 11:31:33 +00:00
D. Shah f05d024666 ecp5: Use snake case for arch-specific functions 
This makes the difference clearer between the general arch API that
everyone must implement; and helper functions specific to one arch.

Signed-off-by: D. Shah <dave@ds0.me>
 2021-02-03 10:53:08 +00:00
D. Shah 9388df19d3 refactor: Replace getXName().c_str(ctx) with ctx->nameOfX 
This makes the ongoing migration to IdStringList easier.

Signed-off-by: D. Shah <dave@ds0.me>
 2021-02-02 17:00:14 +00:00
D. Shah 6d23461bcd ecp5: Proof-of-concept using IdStringList for bel names 
This uses the new IdStringList API to store bel names for the ECP5. Note
that other arches and the GUI do not yet build with this
proof-of-concept patch.

getBelByName still uses the old implementation and could be more
efficiently implemented with further development.

Signed-off-by: D. Shah <dave@ds0.me>
 2021-02-02 17:00:12 +00:00
D. Shah 94e8847d67 cleanup: Spelling fixes 
Signed-off-by: D. Shah <dave@ds0.me>
 2021-01-28 15:19:06 +00:00
David Shah 576baa994f ecp5: Fix some tricky ECLKSYNCB/CLKDIVF packing cases 
Signed-off-by: David Shah <dave@ds0.me>
 2020-10-09 21:41:55 +01:00
David Shah be607c10a8
Merge pull request #489 from YosysHQ/dave/ecp5-fix-ioddrx2 
ecp5: Fix how ODDRX2 SCLK/RST are set
 2020-08-13 20:05:16 +01:00
David Shah fd5d95320b ecp5: Fix how ODDRX2 SCLK/RST are set 
Signed-off-by: David Shah <dave@ds0.me>
 2020-08-13 13:24:52 +01:00
David Shah e475490992 ecp5: Run fixupHierarchy after packing 
Signed-off-by: David Shah <dave@ds0.me>
 2020-08-12 10:12:10 +01:00
David Shah c0901fb972 ecp5: Fix derivation of OSCG timing constraint 
Signed-off-by: David Shah <dave@ds0.me>
 2020-06-29 22:11:00 +01:00