DLLDLY is the clock delay primitive that adjust the input clock
according to the DLLSTEP signal and outputs the delayed clock.
These primitives are associated with clock pins and are "tapped" between
the output of this IBUF and the clock networks, leaving the possibility
to connect to the original unshifted signal as well, although the latter
is not very practical because it is no longer possible to use fast
wires.
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
Gowin chips have an interesting mechanism - wires that run vertically
through several rows (at least 10) in each column of the chip. In each
row a particular wire has branches to the left and right, covering on
average 4 neighboring cells in the row. For lack of a better term, I
further call such a wire a segment.
So a segment can provide a direct connection in a local rectangle. There
are no special restrictions on the sinks, so segment networks can be
used for ClockEnable, LocalSetReset, as well as for LUT and DFF inputs.
The sources are not so simple - the sources can be the upper or lower
end of the segment, which in theory can lead to unfortunate consequences
if the signal is applied from both ends.
The matter is complicated by the fact that there are default
connections, i.e. in the absence of any set fuse the segment input is
still connected to something (VCC for example) and to disable the unused
end of the segment you need to set a special combination of fuses.
Taking into account which end of which segment is used is one of the
tasks of this router. In addition, segment ends can physically coincide
with PLL, DSP and BSRAM inputs, which can also lead to unexpected
effects. Some of these things are tracked when generating the base, some
in this router, some when packing in gowin_pack.
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
Adds the ability to use high-speed clock lines (together with CLKDIV2
type frequency dividers operating on them) as sieve signals for the
CLKIN and CLKFB inputs of the rPLL and PLLVR primitives (these cover the
full range of supported Gowin chips).
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
Boards with Gowin chips are supported in the Himbaechel architecture
with much greater correctness and a wider range of primitives.
In fact, at the moment the advice “use himbaechel-gowin” immediately
solves a
significant part of the issues opened by users.
Of course, you need to wait for amendments to oss-cad-suite, at least
https://github.com/YosysHQ/oss-cad-suite-build/pull/109
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
When -Wnarrowing is enabled, compilation of generated
chipdb*.bin.cc files produces a large number of messages:
"narrowing conversion of ... from ‘int’ to ‘const char’ [-Wnarrowing]"
Explicitly using uint8_t instead of char when referencing
embedded chipdb arrays resolves these issues.
Suggested-by: Catherine <whitequark@whitequark.org>
Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
prjunnamed does not emit a net alias for toplevel ports. This works
fine for constraining IOs but breaks clock constraints. This commit
expands clock constraint application code to look up net aliases first,
ports second.
prjunnamed normalizes ports that are not present in the primitive
to be all-x. On iCE40, this can cause a false placement conflict
between `SB_IO` cells where one's clock input is `x` and another's is
some other net.
* Gowin. Add I3C io buffer.
A buffer is added that can operate as a normal IOBUF in PUSH-PULL mode
or switch to open-drain IOBUF mode.
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
* Gowin. Turn a variable into a set of flags
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
---------
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
Adds output (MIPI_OBUF and MIPI_OBUF_A) and input (MIPI_IBUF) primitives
to allow the use of “real” MIPI (not emulation) ports capable of
operating in both HS and LP modes.
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
Due to the way CMake-generated Makefiles evaluate dependencies, this
calls the `.bba` generation custom command twice, which then fails as
they both use the same `.bba.new` file as an output and one of them
moves it first.
This broke builds using `make -j` but not builds using
`make -j nextpnr-himbaechel-example`.
Under certain conditions (e.g., building on Fedora 42
using gcc-15.0.1), compilation fails with the following
error:
"error: ‘uint8_t’ does not name a type"
Explicitly include <cstdint> to prevent that situation.
Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
This is useful for certain cross-compilation workloads, and to cache
rarely changing build products.
To use this functionality, build e.g. as follows:
cmake . -B build-export -DEXPORT_BBA_FILES=../bba-files -DARCH=all
cmake --build build-export -t nextpnr-all-bba
cmake . -B build-import -DIMPORT_BBA_FILES=../bba-files -DARCH=all
cmake --build build-import
The impetus for this commit is the fact that it causes rare but
build-breaking race conditions when used with `make -jN` with `N > 1`.
These race conditions are difficult to track down or fix because of
the very rudmentary debugging tools provided by `make` and opaque
semantics of CMake's Makefile generator. They break the build by
running two `.bba` generation processes, then one of them renaming
the `.bba.new` file once it's done, leaving the other one to fail.
After reflection (as the author of this code path) and discussion with
community members who use it, I've concluded that this isn't the right
approach.
1. In practice, on targets where `-DSERIALIZE_CHIPDBS=` matters, you
also care about other build steps, like linking nextpnr, which
are not serializable this way. So you use a workaround anyway, like
`make`ing individual targets instead.
2. The way to serialize the build with Make is the `-j1` option. Trying
to work around `-jN` to make it work like `-j1` is inherently error
prone. While there is some utility in not serializing C++ compilation
this utility could be more easily achieved by providing a single
target that builds all chipdbs, running `make <chipdb-target> -j1`,
then running `make -jN` for the rest of the build.
Two user-visible changes were made:
* `-DUSE_RUST` is replaced with `-DBUILD_RUST`, by analogy with
`-DBUILD_PYTHON`
* `-DCOVERAGE` was removed as it doesn't work with either modern GCC
or Clang
This removes the atomic rename for bbasm outputs because it embeds
the resulting paths into the `.cc` files in embed mode. In any case
the write should be fast enough to not be a big risk for interrupted
builds.
This was tested with Clang 19 only (gcc hasn't had a release that
supports `#embed` yet).
Primarily, this commit makes both of them use the `BBAsm` functions
to build and compile `.bba` files.
In addition, Himbaechel targets are now aligned with the rest in
how they are configured: instead of having all uarches enabled with
all of the devices disabled (the opposite of the rest of nextpnr),
uarches must be enabled explicitly but they come with all devices
enabled (except for Xilinx, which does not have a list of devices).
While it served a purpose (granting the ability to build `.bba` files
separately from the rest of nextpnr), it made things excessively
convoluted, especially around paths.
This commit removes the ability to pre-generate chip databases. As far
as I know, I was the primary user of that feature. It can be added back
if there is demand for it.
In exchange the per-family `CMakeLists.txt` files are now much easier
to understand.
The two main changes, done together in this commit, are:
* Eliminating most instances of `aux_source_directory()`, replacing
them with explicit file listings; and
* Moving these file listings into respective subdirectories by
representing respective nextpnr components as interface libraries.
In addition, the GUI CMake script tree was simplified since it had
a lot of unused/redundant code.
The `aux_source_directory()` command is not recommended for use by
CMake itself because it misses dependency changes when adding/removing
files, and consequently causes build failures requiring a clean rebuild.
This commit does not touch anything related to architectures/families,
which are very complex and redundant all on their own.
Erroneously created wires for specific IOs on the underside of some
chips.
Fixes https://github.com/YosysHQ/nextpnr/issues/1417
Also cosmetic edits.
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
* Gowin. Add the ability to place registers in IOB
IO blocks have registers: for input, for output and for OutputEnable
signal - IREG, OREG and TREG respectively.
Each of the registers has one implicit non-switched wire, which one
depends on the type of register (IREG has a Q wire, OREG has a D wire).
Although the registers can be activated independently of each other they
share the CLK, ClockEnable and LocalSetReset wires and this places
restrictions on the possible combinations of register types in a single
IO.
Register placement in IO blocks is enabled by specifying the command
line keys --vopt ireg_in_iob, --vopt oreg_in_iob, or --vopt ioreg_in_iob.
It should be noted that specifying these keys leads to attempts to place
registers in IO blocks, but no errors are generated in case of failure.
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
* Gowin. Registers in IO
Check for unconnected ports.
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
* Gowin. IO regs. Verbose warnings.
If an attempt to place an FF in an IO block fails, issue a warning
detailing the reason for the failure, whether it is a register type
conflict, a network requirement violation, or a control signal conflict.
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
* Gowin. BUGFIX. Fix FFs compatibility.
Flipflops with a fixed ClockEnable input cannot coexist with flipflops
with a variable one.
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
* Gowin. FFs in IO. Changing diagnostic messages.
Placement modes are still specified by the command line keys
ireg_in_iob/oreg_in_iob/ioreg_in_iob, but also introduces more granular
control in the form of attributes at I/O ports:
(* NOIOBFF *) - registers are never placed in this IO,
(* IOBFF *) - registers must be placed in this IO, in case of failure
a warning (not an error) with the reason for nonplacement is issued,
_attribute_absence_ - no diagnostics will be issued: managed to place - good, failed - not bad either.
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
* Gowin. Registers in IO.
Change the logic for handling command line keys and attributes -
attributes allow routines to be placed in IO regardless of global mode.
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
* Gowin. Registers in IO. Fix style.
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
---------
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
Adds additional restrictions on the first PIP after the clock source -
only connections to SPINEs are allowed. This allowed to correct the
behaviour of DQCEs since the latter can only disable/enable SPINEs.
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
YRabbit
Lofty
gatecat
Miodrag Milanović
Gabriel Somlo
Catherine
Aritz Erkiaga
Tarik Graba