* CPE mapping improvements
* Use CP_OUT for adders
* Fixes
* Small fixes
* Cleanups
* Cleanup
* Cleanups
* Fixes
* Fixes
* Optimize
* Cleanup
* clangformat
* Cleanup
* Cleanup
* Bump required version of database
* Cleanup
* Resolve name conflicts
* Fix signal routing
* Make CPE_LATCH separate
* Add more timings models, need updated values
* Fixed warning
* multiplier support from lofty/gatemate-mult
* explicitly zero some params in B passthrough
* comment the relevant CPE inputs in check_multipliers
* Rename some of bels
* remove _lower from name
* refactor multiplier checking
* Revert "remove _lower from name"
This reverts commit daa1041bdf.
* Fixe net name to be unique
* Make sure we at least generate bitstream with all info
* Simplify zero
* Bounded cell type in gui
* typo fix
* Remove A passthrough inversion option
* Clean up CarryGenCell config
* Update a passthru to use new primitives
* Cleanup for adders
* Clean up MsbRoutingCell
* Cleanup
* Refactor A connection code
* Make it more as in PR #1513
* Added cplines to bpassthru and fixed constant driver for A
* Add parts
* Added comp out connections
* clangformat
* clangformat
* Clean up B passthrough connections
* wire up a bunch of intermediate signals
* Bit of cleanup
* handing of C_EN_IN
* C_EN_CIN fixes
* connect f_route to its lines
* fix cite for FRoutingCell
* fixup, oops
* connect multfab to its lines
* Commented line
* Connect CPOUTs
* Handle C_I params
* connect CINY1 for CarryGenCell
* fix carry gen CINX
* Update L2T4 model
* Updates for ADDCIN
* clangformat
* fix some issues with multfab and f_route
* look at C_I when doing inversion
* Only set some C_I signals when used
* Fix one more place
* do not use cplines so we can merge in one cell
* Cover cases that could be optimized out
* clangformat
* Cleanups
* Disable multiplier usage for now
---------
Co-authored-by: Lofty <dan.ravensloft@gmail.com>
Boards with Gowin chips are supported in the Himbaechel architecture
with much greater correctness and a wider range of primitives.
In fact, at the moment the advice “use himbaechel-gowin” immediately
solves a
significant part of the issues opened by users.
Of course, you need to wait for amendments to oss-cad-suite, at least
https://github.com/YosysHQ/oss-cad-suite-build/pull/109
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
Two user-visible changes were made:
* `-DUSE_RUST` is replaced with `-DBUILD_RUST`, by analogy with
`-DBUILD_PYTHON`
* `-DCOVERAGE` was removed as it doesn't work with either modern GCC
or Clang
The two main changes, done together in this commit, are:
* Eliminating most instances of `aux_source_directory()`, replacing
them with explicit file listings; and
* Moving these file listings into respective subdirectories by
representing respective nextpnr components as interface libraries.
In addition, the GUI CMake script tree was simplified since it had
a lot of unused/redundant code.
The `aux_source_directory()` command is not recommended for use by
CMake itself because it misses dependency changes when adding/removing
files, and consequently causes build failures requiring a clean rebuild.
This commit does not touch anything related to architectures/families,
which are very complex and redundant all on their own.
* Items such as LUT, DFF, MUX, ALU, IOB are displayed;
* Local wires, 1-2-4-8 wires are displayed;
* The clock spines, taps and branches are displayed with some caveats.
For now, you can not create a project in the GUI because of possible
conflict with another PR (about GW1NR-9C support), but you can specify
the board in the command line and load .JSON and .CST in the GUI.
Although ALUs are displayed, but the CIN and COUT wires are not. This is
still an unsolved problem.
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
Miodrag Milanović
YRabbit
Catherine
gatecat
Lofty
dragonmux
Justin Rajewski
rowanG077