Merge branch 'master' into netgen-1.5

Extended the verilog parsing to parse definitions such that nested
definitions are handled correctly. Also: Added code to evaluate simple expressions for array bounds. Previously the parser could handle a value followed by "+" or "-" and a constant. Now it can handle all basic arithmetic.
2026-08-22 22:17:22 +02:00 · 2022-04-15 02:00:16 -04:00 · 2022-04-14 22:33:58 -04:00 · 2022-01-17 03:00:14 -05:00 · 2022-01-16 14:47:52 -05:00 · 2022-01-16 14:16:30 -05:00
27 changed files with 2651 additions and 2378 deletions
@@ -0,0 +1,40 @@
+# This is a basic workflow to help you get started with Actions
+
+name: CI
+
+# Controls when the workflow will run
+on:
+  # Triggers the workflow on push or pull request events but only for the master branch
+  push:
+    branches: [ master ]
+  pull_request:
+    branches: [ master ]
+
+  # Allows you to run this workflow manually from the Actions tab
+  workflow_dispatch:
+
+# A workflow run is made up of one or more jobs that can run sequentially or in parallel
+jobs:
+  # This workflow contains a single job called "build"
+  build:
+    # The type of runner that the job will run on
+    runs-on: ubuntu-latest
+
+    # Steps represent a sequence of tasks that will be executed as part of the job
+    steps:
+      # Runs a set of commands using the runners shell
+      #- name: Logging into Dockerhub
+      #  run: docker login -u ${{ secrets.DOCKERHUB_USERNAME }} -p ${{ secrets.DOCKERHUB_PASSWORD }}
+        
+      - name: Pulling the docker image
+        run: docker pull vezzal/vezzal:v1
+        
+      - name: Start the container with the docker image
+        run: docker run -id --name test_netgen vezzal/vezzal:v1 bash | exit
+        
+      - name: Run the testing on the container and send the mail
+        run: docker exec test_netgen /vezzal/test_netgen.sh "[email protected],[email protected]" ${{ secrets.MAILING_KEY }}
+        
+  
+      
+          
@@ -7,8 +7,11 @@ config.log
 scripts/config.log
 config.status
 scripts/config.status
+python/lvs_manager.py
 *.o
 *.so
 *~
 *.log
 UPDATE_ME
+tcltk/netgen.sh
+tcltk/netgen.tcl
@@ -1,4 +1,8 @@
-NETGEN:  VERSION 1.5
+![Continuous Integration](https://github.com/RTimothyEdwards/netgen/actions/workflows/main.yml/badge.svg)
+
+# NETGEN
+
+### VERSION 1.5

 NETGEN is a general-purpose netlist management system.  It can read
 and write several netlist formats, including NTK (Caltech, CMU),
@@ -87,6 +91,49 @@ and IRSIM version 9.7:

 Note: For FreeBSD, use 'gmake' instead.

+Note: On MacOS (Big Sur) follow the following procedure. If you have installed `xschem` and `magic` already on MacOS then steps (1) and (2) can likely be skipped.
+
+**1) Build Tcl for X11**
+
+We are following the instructions from `xschem` (https://github.com/StefanSchippers/xschem/blob/master/README_MacOS.md). 
+
+* Download `Tcl` from https://prdownloads.sourceforge.net/tcl/tcl8.6.10-src.tar.gz
+
+We are using not `opt` but `opt2` so that this `Tcl` does not interfere with `tcl-tk` from HomeBrew.
+
+```
+./configure --prefix=/usr/local/opt2/tcl-tk  
+make
+make install
+```
+
+**2) Build Tk for X11**
+
+* Download `Tk` from https://prdownloads.sourceforge.net/tcl/tk8.6.10-src.tar.gz
+
+```
+./configure --prefix=/usr/local/opt2/tcl-tk \
+--with-tcl=/usr/local/opt2/tcl-tk/lib --with-x \
+--x-includes=/opt/X11/include --x-libraries=/opt/X11/lib  
+make
+make install
+```
+
+**3) Build netgen**
+
+We need to provide this custom-built `tcl-tk` and suppress compilation errors.
+
+```
+./configure --with-tcl=/usr/local/opt2/tcl-tk/lib \
+--with-tk=/usr/local/opt2/tcl-tk/lib \
+--x-includes=/opt/X11/include \
+--x-libraries=/opt/X11/lib \
+CFLAGS=-Wno-error=implicit-function-declaration
+make
+make install
+```
+
+
 IN CASE OF FAILURE
 -------------------
 Please contact me (tim@opencircuitdesign.com) to report compile-time and
@@ -1 +1 @@
-1.5.166
+1.5.220
@@ -23,12 +23,13 @@ the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
 #include <stdio.h>
 #include <stdlib.h>	/* for strtod() */
 #include <stdarg.h>
+#include <ctype.h>

 #include "netgen.h"
-#include "hash.h"
 #include "objlist.h"
 #include "netfile.h"
 #include "print.h"
+#include "hash.h"

 void extCell(char *name, int filenum)
 {
@@ -186,7 +187,7 @@ char *ReadExt(char *fname, int doflat, int *fnum)
  /* Make sure all .ext file reading is case sensitive */
  matchfunc = match;
  matchintfunc = matchfile;
-  hashfunc = hash;
+  hashfunc = hashcase;

  if (LookupCellFile(fname, filenum) != NULL) {
    Printf("Error:  Duplicate cell name \"%s\"!\n", fname);
@@ -652,7 +653,7 @@ char *ReadSim(char *fname, int *fnum)
  /* Make sure all .sim file reading is case sensitive */
  matchfunc = match;
  matchintfunc = matchfile;
-  hashfunc = hash;
+  hashfunc = hashcase;

  CellDef(fname, filenum);

@@ -193,17 +193,19 @@ void flattenCell(char *name, int file)
 	if (Debug) Printf("Renaming %s to %s\n", tmp->name, tmpstr);
 	FreeString(tmp->name);
 	tmp->name = strsave(tmpstr);
-#if OLDPREFIX
-	sprintf(tmpstr, "%s%s%s", ParentParams->instance.name, SEPARATOR,
-		tmp->instance.name);
-#else
-	strcpy(tmpstr+prefixlength,tmp->instance.name);
-#endif
-	FreeString(tmp->instance.name);
-	tmp->instance.name = strsave(tmpstr);
 	HashPtrInstall(tmp->name, tmp, &(ThisCell->objdict));
-	if (tmp->type == FIRSTPIN) 
-	  HashPtrInstall(tmp->instance.name, tmp, &(ThisCell->instdict));
+	if ((tmp->type != NODE) && (tmp->instance.name != NULL)) {
+#if OLDPREFIX
+	   sprintf(tmpstr, "%s%s%s", ParentParams->instance.name, SEPARATOR,
+		    tmp->instance.name);
+#else
+	   strcpy(tmpstr+prefixlength,tmp->instance.name);
+#endif
+	   FreeString(tmp->instance.name);
+	   tmp->instance.name = strsave(tmpstr);
+	   if (tmp->type == FIRSTPIN) 
+	      HashPtrInstall(tmp->instance.name, tmp, &(ThisCell->instdict));
+        }
      }

      /* splice instance out of parent */
@@ -252,9 +254,10 @@ void flattenCell(char *name, int file)
 int flattenInstancesOf(char *name, int fnum, char *instance)
 {
  struct objlist *ParentParams;
-  struct objlist *ParentProps;
-  struct objlist *NextObj;
-  struct objlist *ChildObjList;
+  struct objlist *ParentProps, *CurrentProp;
+  struct objlist *NextObj, *LastObj, *prepp;
+  struct objlist *ChildObjList, *ChildListEnd;
+  struct objlist *ChildStart, *ChildEnd, *ParentEnd, *ParentNext;
  struct nlist *ThisCell;
  struct  nlist *ChildCell;
  struct objlist *tmp, *ob2, *ob3;
@@ -296,21 +299,35 @@ int flattenInstancesOf(char *name, int fnum, char *instance)
  while (notdone) {
    notdone = 0;
    ParentParams = ThisCell->cell;
+    LastObj = NULL;
+
    for (ParentParams = ThisCell->cell; ParentParams != NULL;
-	 ParentParams = NextObj) {
+		ParentParams = NextObj) {
      if (Debug) Printf("Parent = %s, type = %d\n",
 			ParentParams->name, ParentParams->type);
      NextObj = ParentParams->next;
-      if (ParentParams->type != FIRSTPIN) continue;
-      if (!(*matchfunc)(ParentParams->model.class, instance)) continue;
+      if (ParentParams->type != FIRSTPIN) {
+	  LastObj = ParentParams;
+	  continue;
+      }
+      if (!(*matchfunc)(ParentParams->model.class, instance)) {
+	  LastObj = ParentParams;
+	  continue;
+      }

      ChildCell = LookupCellFile(ParentParams->model.class, ThisCell->file);
      if (Debug)
 	 Printf(" Flattening instance: %s, primitive = %s\n",
 			ParentParams->instance.name, (ChildCell->class == 
 			CLASS_SUBCKT) ? "no" : "yes");
-      if (ChildCell->class != CLASS_SUBCKT) continue;
-      if (ChildCell == ThisCell) continue;	// Avoid infinite loop
+      if ((ChildCell->class != CLASS_SUBCKT) && (ChildCell->class != CLASS_MODULE)) {
+	   LastObj = ParentParams;
+	   continue;
+      }
+      if (ChildCell == ThisCell) {
+	   LastObj = ParentParams;
+	   continue;	// Avoid infinite loop
+      }

      /* Does the parent cell have properties?  If so, save a pointer to them */
      for (ParentProps = ParentParams->next; ParentProps &&
@@ -318,202 +335,257 @@ int flattenInstancesOf(char *name, int fnum, char *instance)
 		ParentProps = ParentProps->next) {
 	 if (ParentProps->type == PROPERTY) break;
      }
-      if (ParentProps && (ParentProps->type != PROPERTY)) ParentProps = NULL;
-
-      /* not primitive, so need to flatten this instance */
-      notdone = 1;
-      /* if this is a new instance, flatten it */
-      /* if (ChildCell->dumped == 0) flattenCell(ParentParams->model.class, file); */
-
-      ChildObjList = CopyObjList(ChildCell->cell, 1);
-      numflat++;
-
-      /* update node numbers in child to unique numbers */
-      oldmax = 0;
-      for (tmp = ChildObjList; tmp != NULL; tmp = tmp->next) 
-	if (tmp->node > oldmax) oldmax = tmp->node;
-      if (nextnode <= oldmax) nextnode = oldmax + 1;
-
-      for (tmp = ChildObjList; tmp != NULL; tmp = tmp->next) 
-	if (tmp->node <= oldmax && tmp->node > 0) {
-	  if (Debug) Printf("Update node %d --> %d\n", tmp->node, nextnode);
-	  UpdateNodeNumbers(ChildObjList, tmp->node, nextnode);
-	  nextnode++;
-	}
-
-      /* copy nodenumbers of ports from parent */
-      ob2 = ParentParams;
-      for (tmp = ChildObjList; tmp != NULL; tmp = tmp->next) 
-	if (IsPort(tmp)) {
-	  if (tmp->node > 0) {
-	    if (ob2->node == -1) {
-
-	       // Before commiting to attaching to a unconnected node, see
-	       // if there is another node in ParentParams with the same
-	       // name and a valid node number.  If so, connect them.  In
-	       // the broader case, it may be necessary to consider all
-	       // nodes, not just those with node == -1, and call join()
-	       // here to update all node numbers in the parent cell.
-	       // In that case, a more efficient method is needed for
-	       // tracking same-name ports.
-
-	       for (ob3 = ParentParams; ob3 && ob3->type >= FIRSTPIN; ob3 = ob3->next) {
-		   if (ob3 == ob2) continue;
-		   if ((*matchfunc)(ob3->name, ob2->name) && ob3->node != -1) {
-		       ob2->node = ob3->node;
-		       break;
-		   }
-	       }
-	    }
-	    if (Debug) {
-	       // Printf("  Sealing port: %d to node %d\n", tmp->node, ob2->node);
-	       Printf("Update node %d --> %d\n", tmp->node, ob2->node);
-	    }
-	    UpdateNodeNumbers(ChildObjList, tmp->node, ob2->node);
-	  }
-
-	/* in pathological cases, the lengths of the port lists may
-           change.  This is an error, but that is no reason to allow
-           the code to core dump.  We avoid this by placing a 
-           superfluous check on ob2->type
-        */
-
-	  if (ob2 != NULL)
-	    ob2 = ob2->next;
-
-	  if (ob2 == NULL) break;
-	}
-
-      /* Using name == NULL to indicate that a .ext file is being */
-      /* flattened on the fly.  This is quick & dirty.		  */
-
-      if (name != NULL) {
-        /* delete all port elements from child */
-        while ((ChildObjList != NULL) && IsPort(ChildObjList)) {
-	  /* delete all ports at beginning of list */
-	  if (Debug) Printf("deleting leading port from child\n");
-	  tmp = ChildObjList->next;
-	  // FreeObjectAndHash(ChildObjList, ChildCell);
-	  FreeObject(ChildObjList);
-	  ChildObjList = tmp;
-        }
-        tmp = ChildObjList;
-        while (tmp && (tmp->next != NULL)) {
-	  if (IsPort(tmp->next)) {
-	    ob2 = (tmp->next)->next;
-	    if (Debug) Printf("deleting a port from child\n");
-	    // FreeObjectAndHash(tmp->next, ChildCell);
-	    FreeObject(tmp->next);
-	    tmp->next = ob2;
-	  } 
-	  else tmp = tmp->next;
-        }
+      if (ParentProps && (ParentProps->type != PROPERTY)) {
+	  ParentProps = NULL;
+	  CurrentProp = NULL;
      }
+      else
+	  CurrentProp = ParentProps;

-      /* for each element in child, prepend 'prefix' */
+      /* Find the end record of the parent cell and save it */
+      for (ParentEnd = (ParentProps) ? ParentProps : ParentParams;
+		ParentEnd && ParentEnd->next &&
+		/* Stop on a node or the next instance */
+		((ParentEnd->next->type > FIRSTPIN) ||
+		    (ParentEnd->next->type == PROPERTY));
+		ParentEnd = ParentEnd->next);
+
+      /* Not primitive, so need to flatten this instance */
+      notdone = 1;
+
+      /* Loop over property records.  Need to flatten once per	*/
+      /* property record (or more, if property has M > 1)	*/
+
+      ob2 = NULL;
+      ChildObjList = NULL;
+      ChildListEnd = NULL;
+      while (1) {
+
+         ChildStart = CopyObjList(ChildCell->cell, 1);
+         numflat++;
+
+         /* Find the end record of the child cell and save it */
+         for (ChildEnd = ChildStart; ChildEnd && ChildEnd->next;
+			ChildEnd = ChildEnd->next);
+
+         if (ChildListEnd == NULL) ChildListEnd = ChildEnd;
+
+         /* update node numbers in child to unique numbers */
+         oldmax = 0;
+         for (tmp = ChildStart; tmp != NULL; tmp = tmp->next) {
+	    if (tmp->node > oldmax) oldmax = tmp->node;
+	    if (tmp->node > 0) tmp->node += (nextnode - 1);
+	 }
+	 nextnode += oldmax;
+
+         /* copy nodenumbers of ports from parent */
+         ob2 = ParentParams;
+         for (tmp = ChildStart; tmp && IsPort(tmp); tmp = tmp->next)  {
+	     if (tmp->node > 0) {
+	          if (ob2->node == -1) {
+
+	             // Before commiting to attaching to a unconnected node, see
+	             // if there is another node in ParentParams with the same
+	             // name and a valid node number.  If so, connect them.  In
+	             // the broader case, it may be necessary to consider all
+	             // nodes, not just those with node == -1, and call join()
+	             // here to update all node numbers in the parent cell.
+	             // In that case, a more efficient method is needed for
+	             // tracking same-name ports.
+
+	             for (ob3 = ParentParams; ob3 && ob3->type >= FIRSTPIN;
+					ob3 = ob3->next) {
+		        if (ob3 == ob2) continue;
+		        if ((*matchfunc)(ob3->name, ob2->name) && ob3->node != -1) {
+		           ob2->node = ob3->node;
+		           break;
+		        }
+	             }
+	          }
+	          if (Debug) {
+	             // Printf("  Sealing port: %d to node %d\n", tmp->node, ob2->node);
+	             Printf("Update node %d --> %d\n", tmp->node, ob2->node);
+	          }
+	          UpdateNodeNumbers(ChildStart, tmp->node, ob2->node);
+	     }
+
+	     /* in pathological cases, the lengths of the port lists may
+              * change.  This is an error, but that is no reason to allow
+              * the code to core dump.  We avoid this by placing a 
+              * superfluous check on ob2->type
+              */
+	     if (ob2 != NULL) ob2 = ob2->next;
+
+	     if (ob2 == NULL) break;
+	 }
+
+         /* Using name == NULL to indicate that a .ext file is being 	*/
+         /* flattened on the fly.  This is quick & dirty.		*/
+
+         if (name != NULL) {
+            /* delete all port elements from child */
+            while ((ChildStart != NULL) && IsPort(ChildStart)) {
+	       /* delete all ports at beginning of list */
+	       if (Debug) Printf("deleting leading port from child\n");
+	       tmp = ChildStart->next;
+	       FreeObject(ChildStart);
+	       ChildStart = tmp;
+            }
+            tmp = ChildStart;
+            while (tmp && (tmp->next != NULL)) {
+	       if (IsPort(tmp->next)) {
+	          ob2 = (tmp->next)->next;
+	          if (Debug) Printf("deleting a port from child\n");
+	          FreeObject(tmp->next);
+	          tmp->next = ob2;
+	       } 
+	       else tmp = tmp->next;
+            }
+	    if (ChildStart == NULL) {
+	       if (ChildListEnd == ChildEnd) ChildListEnd = NULL;
+	       ChildEnd = NULL;
+	    }
+         }
+
+         /* for each element in child, prepend 'prefix' */
 #if !OLDPREFIX
-      /* replaces all the sprintf's below */
-      strcpy(tmpstr,ParentParams->instance.name);
-      strcat(tmpstr,SEPARATOR);
-      prefixlength = strlen(tmpstr);
+         /* replaces all the sprintf's below */
+         strcpy(tmpstr,ParentParams->instance.name);
+         strcat(tmpstr,SEPARATOR);
+         prefixlength = strlen(tmpstr);
 #endif
-      for (tmp = ChildObjList; tmp != NULL; tmp = tmp->next) {
-	if (tmp->type == PROPERTY)
-	    continue;
+         for (tmp = ChildStart; tmp != NULL; tmp = tmp->next) {
+	    if (tmp->type == PROPERTY)
+	       continue;

-	else if (IsGlobal(tmp)) {
-	   /* Keep the name but search for node of same name in parent	*/
-	   /* and replace the node number, if found.			*/
+	    else if (IsGlobal(tmp)) {
+	       /* Keep the name but search for node of same name in parent	*/
+	       /* and replace the node number, if found.			*/

-	   for (ob2 = ThisCell->cell; ob2 != NULL; ob2 = ob2->next) {
-	      /* Type in parent may be a port, not a global */
-	      if (ob2->type == tmp->type || ob2->type == PORT) {
-	         if ((*matchfunc)(tmp->name, ob2->name)) {
-		    if (ob2->node >= 0) {
-		       // Replace all child objects with this node number
-		       rnodenum = tmp->node;
-		       for (ob3 = ChildObjList; ob3 != NULL; ob3 = ob3->next) {
-			  if (ob3->node == rnodenum)
-			     ob3->node = ob2->node;
-		       }
-		       break;
-		    }
-		 }
-	      }
-	   }
-	   // Don't hash this if the parent had a port of this name
-	   if (!ob2 || ob2->type != PORT)
-	      HashPtrInstall(tmp->name, tmp, &(ThisCell->objdict));
-	   continue;
-	}
+	       for (ob2 = ThisCell->cell; ob2 != NULL; ob2 = ob2->next) {
+	          /* Type in parent may be a port, not a global */
+	          if (ob2->type == tmp->type || ob2->type == PORT) {
+	             if ((*matchfunc)(tmp->name, ob2->name)) {
+		        if (ob2->node >= 0) {
+		           // Replace all child objects with this node number
+		           rnodenum = tmp->node;
+		           for (ob3 = ChildStart; ob3 != NULL; ob3 = ob3->next) {
+			      if (ob3->node == rnodenum)
+			         ob3->node = ob2->node;
+		           }
+		           break;
+		        }
+		     }
+	          }
+	       }
+	       // Don't hash this if the parent had a port of this name
+	       if (!ob2 || ob2->type != PORT)
+	          HashPtrInstall(tmp->name, tmp, &(ThisCell->objdict));
+	       continue;
+	    }

 #if OLDPREFIX	
-	sprintf(tmpstr, "%s%s%s", ParentParams->instance.name, SEPARATOR,
-		tmp->name);
+	    sprintf(tmpstr, "%s%s%s", ParentParams->instance.name, SEPARATOR,
+				tmp->name);
 #else
-	strcpy(tmpstr+prefixlength,tmp->name);
+	    strcpy(tmpstr+prefixlength,tmp->name);
 #endif
-	if (Debug) Printf("Renaming %s to %s\n", tmp->name, tmpstr);
-	FreeString(tmp->name);
-	tmp->name = strsave(tmpstr);
+	    if (Debug) Printf("Renaming %s to %s\n", tmp->name, tmpstr);
+	    FreeString(tmp->name);
+	    tmp->name = strsave(tmpstr);
+	    HashPtrInstall(tmp->name, tmp, &(ThisCell->objdict));
+	    if ((tmp->type != NODE) && (tmp->instance.name != NULL)) {
 #if OLDPREFIX
-	sprintf(tmpstr, "%s%s%s", ParentParams->instance.name, SEPARATOR,
-		tmp->instance.name);
+	       sprintf(tmpstr, "%s%s%s", ParentParams->instance.name, SEPARATOR,
+		    		tmp->instance.name);
 #else
-	strcpy(tmpstr+prefixlength,tmp->instance.name);
+	       strcpy(tmpstr+prefixlength,tmp->instance.name);
 #endif
-	FreeString(tmp->instance.name);
-	tmp->instance.name = strsave(tmpstr);
-	HashPtrInstall(tmp->name, tmp, &(ThisCell->objdict));
-	if (tmp->type == FIRSTPIN) 
-	  HashPtrInstall(tmp->instance.name, tmp, &(ThisCell->instdict));
-      }
-
-      /* Do property inheritance */
-
-      if (ParentProps) {
-         for (ob2 = ChildObjList; ob2 != NULL; ob2=ob2->next) {
-
-	    /* If the parent cell has properties to declare, then	*/
-	    /* pass them on to children.  Use globals only if the	*/
-	    /* spiceparams dictionary is active (during file reading	*/
-	    /* only).							*/
-
-	    if (ob2->type == PROPERTY)
-		ReduceExpressions(ob2, ParentProps, ChildCell,
-			(spiceparams.hashtab == NULL) ? 0 : 1);
+	       FreeString(tmp->instance.name);
+	       tmp->instance.name = strsave(tmpstr);
+	       if (tmp->type == FIRSTPIN) 
+	          HashPtrInstall(tmp->instance.name, tmp, &(ThisCell->instdict));
+            }
         }
+
+         /* Do property inheritance */
+
+         /* NOTE:  Need to do:  Check properties for M > 1 and decrement
+          * and repeat without moving CurrentProp
+          */
+
+         if (CurrentProp) {
+            for (ob2 = ChildStart; ob2 != NULL; ob2=ob2->next) {
+
+	       /* If the parent cell has properties to declare, then	*/
+	       /* pass them on to children.  Use globals only if the	*/
+	       /* spiceparams dictionary is active (during file		*/
+	       /* reading only).					*/
+
+	       if (ob2->type == PROPERTY)
+		  ReduceExpressions(ob2, CurrentProp, ChildCell,
+				(spiceparams.hashtab == NULL) ? 0 : 1);
+            }
+
+            /* Repeat for each property record, as each property represents a
+             * unique instance that must be flattened individually.
+             */
+
+	    CurrentProp = CurrentProp->next;
+	    if ((CurrentProp == NULL) || (CurrentProp->type != PROPERTY)) break;
+         }
+         else break;
+
+         /* Put the child cell at the start of ChildObjList */
+         ChildEnd->next = ChildObjList;
+         ChildObjList = ChildStart;
      }

-      /* splice instance out of parent */
-      if ((ParentParams == ThisCell->cell) && (ChildObjList == NULL)) {
-	ThisCell->cell = ob2;	/* Child cell was empty */
-	tmp = ob2;
+      /* Put the child cell at the start of ChildObjList */
+      if (ChildEnd) {
+         ChildEnd->next = ChildObjList;
+         ChildObjList = ChildStart;
      }
-      else {
+
+      /* Pull the instance out of the parent */
+
+      if ((ParentParams != ThisCell->cell) || (ChildObjList != NULL)) {
         if (ParentParams == ThisCell->cell) {
-	   /* ParentParams are the very first thing in the list */
-	   ThisCell->cell = ChildObjList;
-	   for (ob2 = ChildObjList; ob2 && ob2->next != NULL; ob2 = ob2->next) ;
+	    /* ParentParams are the very first thing in the list */
+	    ThisCell->cell = ChildObjList;
         }
-         else {
-	   /* find ParentParams in ThisCell list */
-	   for (ob2 = ThisCell->cell; ob2 && ob2->next != ParentParams; ob2=ob2->next); 
-	   if (ob2)
-	      for (ob2->next = ChildObjList; ob2->next != NULL; ob2 = ob2->next) ;
+         else if (ChildObjList) {
+	    /* find ParentParams in ThisCell list.  In most cases, LastObj  */
+	    /* should be pointing to it.				    */
+	    if (LastObj && (LastObj->next == ParentParams)) {
+	       LastObj->next = ChildObjList;
+	    }
+	    else {
+	       for (ob2 = LastObj; ob2 && ob2->next != ParentParams;
+			ob2 = ob2->next); 
+	       if (ob2 == NULL) {
+		  /* It should not happen that LastObj is ahead of ParentParams	*/
+		  /* but just in case, this long loop will find it.		*/
+	          for (ob2 = ThisCell->cell; ob2 && ob2->next != ParentParams;
+				ob2 = ob2->next); 
+	       }
+	       ob2->next = ChildObjList;
+	    }
         }
-         /* now, ob2 is last element in child list, so skip and reclaim parent */
+	 else {
+	    /* The child was completely optimized out, so close list around it */
+	    LastObj->next = ParentEnd->next;
+	 }

-         tmp = ParentParams;
-         do {
-	   tmp = tmp->next;
-         } while ((tmp != NULL) && ((tmp->type > FIRSTPIN) || (tmp->type == PROPERTY)));
-         if (ob2) ob2->next = tmp;
+         /* Link end of child list into the parent */
+	 if (ChildListEnd && ParentEnd)
+	    ChildListEnd->next = ParentEnd->next;
      }
-      while (ParentParams != tmp) {
-	ob2 = ParentParams->next;
-	FreeObjectAndHash(ParentParams, ThisCell);
-	ParentParams = ob2;
+      ParentNext = (ParentEnd) ? ParentEnd->next : NULL;
+      while (ParentParams != ParentNext) {
+	 ob2 = ParentParams->next;
+	 FreeObjectAndHash(ParentParams, ThisCell);
+	 ParentParams = ob2;
      }
      NextObj = ParentParams;
    }				/* repeat until no more instances found */
@@ -1136,9 +1208,10 @@ int UniquePins(char *name, int filenum)
 struct nlist *cleanuppins(struct hashlist *p, void *clientdata)
 {
   struct nlist *ptr;
-   struct objlist *ob, *obt, *lob, *nob, *firstpin;
+   struct objlist *ob, *obt, *lob, *nob, *firstpin, *pob;
   struct nlist *tc = (struct nlist *)clientdata;
   int pinnum;
+   char *saveinst = NULL;

   ptr = (struct nlist *)(p->ptr);
   if (tc->file != ptr->file) return NULL;
@@ -1186,13 +1259,44 @@ struct nlist *cleanuppins(struct hashlist *p, void *clientdata)
 	        }

 		FREE(ob->name);
-		if (ob->instance.name != NULL) FREE(ob->instance.name);
+		if (ob->instance.name != NULL) {
+		    /* Keep a copy of the instance name (see below) */
+		    if (saveinst != NULL) FREE(saveinst);
+		    saveinst = ob->instance.name;
+		}
 		if (ob->model.class != NULL) FREE(ob->model.class);
 		FREE(ob);
 	     }
 	     else {
-		lob = ob;
-		ob->type = pinnum++;	// Renumber pins in order
+		if ((ob->type == PROPERTY) && (pinnum == 1))
+		{
+		    /* If this happens, then all the pins got removed,
+		     * and there is probably something very much wrong
+		     * with the setup.  However, to keep netgen from
+		     * blowing up, add back a "proxy(no pins)" record
+		     * in front; otherwise we'd have an orphaned
+		     * property record.
+		     */
+		    pob = GetObject();
+		    pob->name = (char *)MALLOC(15);
+		    sprintf(pob->name, "proxy(no pins)");
+		    pob->model.class = strsave(ob->model.class);
+		    if (saveinst != NULL)
+			pob->instance.name = strsave(saveinst);
+		    else
+			/* This should never happen */
+			pob->instance.name = strsave("error");
+		    pob->type = pinnum++;
+		    pob->node = -1;
+		    pob->next = ob;
+		    lob->next = pob;
+		    lob = ob;
+		}
+		else
+		{
+		    lob = ob;
+		    ob->type = pinnum++;	// Renumber pins in order
+		}
 	     }
 	     ob = nob;
 	     obt = obt->next;
@@ -1203,6 +1307,8 @@ struct nlist *cleanuppins(struct hashlist *p, void *clientdata)
 	     HashPtrInstall(firstpin->instance.name, firstpin, &(ptr->instdict));
      }
   }
+
+   if (saveinst != NULL) FREE(saveinst);
   return NULL;		/* Keep the search going */
 }

@@ -1308,6 +1414,22 @@ typedef struct ecomplist {
    ECompListPtr next;
 } ECompList;

+/*----------------------------------------------------------------------*/
+/* Determine if a cell contains at least one device or subcircuit	*/
+/*----------------------------------------------------------------------*/
+
+int
+HasContents(struct nlist *tc)
+{
+    struct objlist *ob;
+
+    for (ob = tc->cell; ob; ob = ob->next)
+	if (ob->type == FIRSTPIN)
+	    return TRUE;
+
+    return FALSE;
+}
+
 /*------------------------------------------------------*/
 /* Survey the contents of a cell and sort into a hash	*/
 /*------------------------------------------------------*/
@@ -1405,6 +1527,7 @@ PrematchLists(char *name1, int file1, char *name2, int file2)
    struct hashdict compdict;
    ECompare *ecomp, *ncomp;
    ECompList *list0X, *listX0;
+    int hascontents1, hascontents2;
    int match, modified = 0;

    if (file1 == -1)
@@ -1420,6 +1543,7 @@ PrematchLists(char *name1, int file1, char *name2, int file2)
    if (tc1 == NULL || tc2 == NULL) return 0;

    InitializeHashTable(&compdict, OBJHASHSIZE);
+    listX0 = list0X = NULL;

    // Gather information about instances of cell "name1"
    SurveyCell(tc1, &compdict, file1, file2, 0);
@@ -1432,7 +1556,6 @@ PrematchLists(char *name1, int file1, char *name2, int file2)
    // in the hierarchy of each instance contain devices
    // or subcircuits that have more in the compared circuit.

-    listX0 = list0X = NULL;
    ecomp = (ECompare *)HashFirst(&compdict);
    while (ecomp != NULL) {

@@ -1469,22 +1592,23 @@ PrematchLists(char *name1, int file1, char *name2, int file2)
 			}
 		    }
 		    else {
-		       match = 0;
+		       // cell exists in one circuit but not the other, so flatten it.
+		       // match = 0;
 		       break;
 		    }
 		}
 	    }
 	    if (match) {
-		if (ecomp->cell1) {
-		    Fprintf(stdout, "Flattening instances of %s in cell %s"
+		if (ecomp->cell1 && (ecomp->num1 > 0)) {
+		    Fprintf(stdout, "Flattening instances of %s in cell %s (%d)"
 				" makes a better match\n", ecomp->cell1->name,
-				name1);
+				name1, file1);
 		    flattenInstancesOf(name1, file1, ecomp->cell1->name); 
 		}
-		if (ecomp->cell2) {
-		    Fprintf(stdout, "Flattening instances of %s in cell %s"
+		if (ecomp->cell2 && (ecomp->num2 > 0)) {
+		    Fprintf(stdout, "Flattening instances of %s in cell %s (%d)"
 				" makes a better match\n", ecomp->cell2->name,
-				name2);
+				name2, file2);
 		    flattenInstancesOf(name2, file2, ecomp->cell2->name); 
 		}
 		modified++;
@@ -1536,7 +1660,7 @@ PrematchLists(char *name1, int file1, char *name2, int file2)
 	}

 	/* Case 2:  Cell2 class is a subcircuit, and flattening	*/
-	/* (it without regard to cell1) improves the matching.	*/
+	/* it (without regard to cell1) improves the matching.	*/

 	else if ((ecomp->num1 != ecomp->num2) && (ecomp->cell2 != NULL) &&
 			(ecomp->num2 != 0) && (ecomp->cell2->class == CLASS_SUBCKT)) {
@@ -1565,9 +1689,9 @@ PrematchLists(char *name1, int file1, char *name2, int file2)
 	    }
 	    if (match) {
 		if (ecomp->cell2) {
-		    Fprintf(stdout, "Flattening instances of %s in cell %s"
+		    Fprintf(stdout, "Flattening instances of %s in cell %s (%d)"
 				" makes a better match\n", ecomp->cell2->name,
-				name2);
+				name2, file2);
 		    flattenInstancesOf(name2, file2, ecomp->cell2->name); 
 		}
 		modified++;
@@ -1594,7 +1718,7 @@ PrematchLists(char *name1, int file1, char *name2, int file2)
 	}
 	
 	/* Case 3:  Cell1 class is a subcircuit, and flattening	*/
-	/* (it without regard to cell1) improves the matching.	*/
+	/* it (without regard to cell1) improves the matching.	*/

 	else if ((ecomp->num1 != ecomp->num2) && (ecomp->cell1 != NULL) &&
 			(ecomp->num1 != 0) && (ecomp->cell1->class == CLASS_SUBCKT)) {
@@ -1623,9 +1747,9 @@ PrematchLists(char *name1, int file1, char *name2, int file2)
 	    }
 	    if (match) {
 		if (ecomp->cell1) {
-		    Fprintf(stdout, "Flattening instances of %s in cell %s"
+		    Fprintf(stdout, "Flattening instances of %s in cell %s (%d)"
 				" makes a better match\n", ecomp->cell1->name,
-				name1);
+				name1, file1);
 		    flattenInstancesOf(name1, file1, ecomp->cell1->name); 
 		}
 		modified++;
@@ -1706,9 +1830,9 @@ PrematchLists(char *name1, int file1, char *name2, int file2)
 				    }
 				    if (found) {
 					Fprintf(stdout, "Removing zero-valued device "
-						"%s from cell %s makes a better match\n",
-						tsub1->name,
-						tc1->name);
+						"%s from cell %s (%d) makes a better "
+						"match\n",
+						tsub1->name, tc1->name, tc1->file);

 					/* A current source is an open, while a	    */
 					/* resistor or voltage source is a short.   */
@@ -1817,9 +1941,9 @@ PrematchLists(char *name1, int file1, char *name2, int file2)
 				    }
 				    if (found) {
 					Fprintf(stdout, "Removing zero-valued device "
-						"%s from cell %s makes a better match\n",
-						tsub2->name,
-						tc2->name);
+						"%s from cell %s (%d) makes a better "
+						"match\n",
+						tsub2->name, tc2->name, tc2->file);

 					/* merge node of endpoints */
 					if (ecomp->cell2->class != CLASS_ISOURCE) {
@@ -1910,8 +2034,8 @@ PrematchLists(char *name1, int file1, char *name2, int file2)
 			    if (dstr) *dstr = '[';
 			    if ((ncomp == ecomp0X) && (ecomp0X->num2 <= ecompX0->num1)) {
 				Fprintf(stdout, "Flattening instances of %s in cell %s"
-					" makes a better match\n", ecompX0->cell1->name,
-					name1);
+					"(%d) makes a better match\n",
+					ecompX0->cell1->name, name1, file1);
 				flattenInstancesOf(name1, file1, ecompX0->cell1->name); 
 			        ecompX0->num1 = 0;
 			        ecomp0X->num1 += ecompX0->num1;
@@ -1936,8 +2060,8 @@ PrematchLists(char *name1, int file1, char *name2, int file2)
 			    if (dstr) *dstr = '[';
 			    if ((ncomp == ecompX0) && (ecompX0->num1 <= ecomp0X->num2)) {
 				Fprintf(stdout, "Flattening instances of %s in cell %s"
-					" makes a better match\n", ecomp0X->cell2->name,
-					name2);
+					" (%d) makes a better match\n",
+					ecomp0X->cell2->name, name2, file2);
 				flattenInstancesOf(name2, file2, ecomp0X->cell2->name); 
 			        ecomp0X->num2 = 0;
 			        ecompX0->num2 += ecomp0X->num2;
@@ -1951,6 +2075,7 @@ PrematchLists(char *name1, int file1, char *name2, int file2)
 	}
    }

+done:
    // Free the hash table and its contents.

    ecomp = (ECompare *)HashFirst(&compdict);
@@ -0,0 +1,8 @@
+#ifndef _FLATTEN_H
+#define _FLATTEN_H
+
+extern int UniquePins(char *name, int filenum);
+extern void flattenCell(char *name, int file);
+extern int HasContents(struct nlist *);
+
+#endif /* _FLATTEN_H */
@@ -30,8 +30,8 @@ the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
 #endif

 #include "netgen.h"
-#include "hash.h"
 #include "objlist.h"
+#include "hash.h"

 unsigned long (*hashfunc)(char *, int) = NULL;
 int (*matchfunc)(char *, char *) = NULL;
@@ -148,7 +148,7 @@ unsigned long hashnocase(char *s, int hashsize)
 	return (hashsize == 0) ? hashval : (hashval % hashsize);
 }

-unsigned long hash(char *s, int hashsize)
+unsigned long hashcase(char *s, int hashsize)
 {
 	unsigned long hashval;
 	
@@ -48,7 +48,7 @@ extern void *HashFirst(struct hashdict *dict);
 extern void *HashNext(struct hashdict *dict);

 extern unsigned long hashnocase(char *s, int hashsize);
-extern unsigned long hash(char *s, int hashsize);
+extern unsigned long hashcase(char *s, int hashsize);

 extern int (*matchfunc)(char *, char *);
 /* matchintfunc() compares based on the name and the first	*/
@@ -7,7 +7,6 @@ extern struct nlist *Circuit1;
 extern struct nlist *Circuit2;

 extern int ExhaustiveSubdivision;
-extern int FastSymmetryBreaking;

 extern int left_col_end;
 extern int right_col_end;
@@ -27,6 +26,7 @@ extern void PrintCoreStats(void);
 extern void ResetState(void);
 extern void CreateTwoLists(char *name1, int file1, char *name2, int file2,
 		int dolist);
+extern void DescribeContents(char *name1, int file1, char *name2, int file2);
 extern int Iterate(void);
 extern int VerifyMatching(void);
 extern void PrintAutomorphisms(void);
@@ -47,6 +47,7 @@ extern int  CreateCompareQueue(char *, int, char *, int);
 extern int  GetCompareQueueTop(char **, int *, char **, int *);
 extern int  PeekCompareQueueTop(char **, int *, char **, int *);
 extern void RemoveCompareQueue();
+extern int FlattenUnmatched(struct nlist *, char *, int, int);

 extern void PrintIllegalClasses();
 extern void PrintIllegalNodeClasses();
@@ -55,6 +56,15 @@ extern void PrintIllegalElementClasses();
 extern void DumpNetwork(struct objlist *ob, int cidx);
 extern void DumpNetworkAll(char *name, int file);

+extern void RegroupDataStructures();
+extern void FormatIllegalElementClasses();
+extern void FormatIllegalNodeClasses();
+extern int ResolveAutomorphsByProperty();
+extern int ResolveAutomorphsByPin();
+extern void SummarizeElementClasses(struct ElementClass *EC);
+extern int remove_group_tags(struct objlist *ob);
+
+
 #ifdef TCL_NETGEN
 extern int EquivalentNode();
 extern int EquivalentElement();
@@ -331,77 +331,87 @@ int GetNextLineNoNewline(char *delimiter)
 	    linetok = (char *)MALLOC(linesize + 1);
 	}

-	/* Check for substitutions (verilog only).  Make sure linetok is    */
-	/* large enough to hold the entire line after substitutions.	    */
-
-	if (definitions != NULL) {
-	    char *s, *w, e;
-	    struct property *kl;
-	    int len, dlen, vlen, addin = 0;
-	    unsigned char found = FALSE;
-
-	    for (s = line; *s != '\0'; s++) {
-		if (*s == '`') {
-		    w = s + 1;
-		    while (isalnum(*w) || (*w == '_') || (*w == '$')) w++;
-		    e = *w;
-		    *w = '\0';
-		    kl = (struct property *)HashLookup(s + 1, definitions);
-		    if (kl != NULL) {
-			dlen = strlen(s);
-			if (kl->type == PROP_STRING) {
-			    vlen = strlen(kl->pdefault.string);
-			}
-			else vlen = 12;  /* Leave room for numeric conversion */
-			addin += vlen - dlen + 1;
-			found = TRUE;
-		    }
-		    *w = e;
-		}
-	    }
-	    if (found) {
-		len = strlen(line);
-		if (len + addin > linesize) {
-		    while (len + addin > linesize) linesize += 500;
-		    FREE(linetok);
-		    linetok = (char *)MALLOC(linesize);
-		}
-	    }
-	}
-
-	/* Make definition substitutions (verilog only) */
-
-	if (definitions != NULL) {
+	if (definitions == NULL)
+	    strcpy(linetok, line);
+	else {
 	    char *s, *t, *w, e;
 	    struct property *kl;
+	    int len, dlen, vlen, addin = 0;
+	    int oldlinesize = linesize;
+	    unsigned char found = TRUE;

-	    t = linetok;
-	    for (s = line; *s != '\0'; s++) {
-		if (*s == '`') {
-		    w = s + 1;
-		    while (isalnum(*w) || (*w == '_') || (*w == '$')) w++;
-		    e = *w;
-		    *w = '\0';
-		    kl = (struct property *)HashLookup(s + 1, definitions);
-		    if (kl != NULL) {
-			if (kl->type == PROP_STRING)
-			    strcpy(t, kl->pdefault.string);
-			else if (kl->type == PROP_INTEGER)
-			    sprintf(t, "%d", kl->pdefault.ival);
-			else if (kl->type == PROP_DOUBLE)
-			    sprintf(t, "%g", kl->pdefault.dval);
-			t += strlen(t);
-			s = w - 1;
+	    /* Check for substitutions (verilog only).  Make sure linetok is	*/
+	    /* large enough to hold the entire line after substitutions.	*/
+
+	    while (found) {	/* Do this recursively, for nested definitions */
+	       found = FALSE;
+
+	       for (s = line; *s != '\0'; s++) {
+		    if (*s == '`') {
+		        w = s + 1;
+		        while (isalnum(*w) || (*w == '_') || (*w == '$')) w++;
+		        e = *w;
+		        *w = '\0';
+		        kl = (struct property *)HashLookup(s + 1, definitions);
+		        if (kl != NULL) {
+			    dlen = strlen(s);
+			    if (kl->type == PROP_STRING) {
+			        vlen = strlen(kl->pdefault.string);
+			    }
+			    else vlen = 12;  /* Leave room for numeric conversion */
+			    addin += vlen - dlen + 1;
+			    found = TRUE;
+		        }
+		        *w = e;
+		    }
+	        }
+	        if (found) {
+		    len = strlen(line);
+		    if (len + addin > linesize) {
+		        while (len + addin > linesize) linesize += 500;
+		        FREE(linetok);
+		        linetok = (char *)MALLOC(linesize);
+		    }
+	        }
+
+		/* Make definition substitutions (verilog only) */
+
+	        t = linetok;
+	        for (s = line; *s != '\0'; s++) {
+		    if (*s == '`') {
+		        w = s + 1;
+		        while (isalnum(*w) || (*w == '_') || (*w == '$')) w++;
+		        e = *w;
+		        *w = '\0';
+		        kl = (struct property *)HashLookup(s + 1, definitions);
+		        if (kl != NULL) {
+			    if (kl->type == PROP_STRING)
+			        strcpy(t, kl->pdefault.string);
+			    else if (kl->type == PROP_INTEGER)
+			        sprintf(t, "%d", kl->pdefault.ival);
+			    else if (kl->type == PROP_DOUBLE)
+			        sprintf(t, "%g", kl->pdefault.dval);
+			    t += strlen(t);
+			    s = w - 1;
+		        }
+		        else *t++ = *s;
+		        *w = e;
 		    }
 		    else *t++ = *s;
-		    *w = e;
+	        }
+	        *t = '\0';
+
+		/* Copy substituted linetok back to line and repeat until */
+		/* there are no more substitutions to be made.		  */
+
+		if (oldlinesize != linesize) {
+		    FREE(line);
+	    	    line = (char *)MALLOC(linesize + 501);
+		    oldlinesize = linesize;
 		}
-		else *t++ = *s;
+		strcpy(line, linetok);
 	    }
-	    *t = '\0';
 	}
-	else
-	    strcpy(linetok, line);

 	TrimQuoted(linetok);
 	linenum++;
@@ -896,7 +906,9 @@ char *ReadNetlist(char *fname, int *fnum)

  /* make first pass looking for extension */
  for (index = 0; formats[index].extension != NULL; index++) {
-    if (strstr(fname, formats[index].extension) != NULL) {
+    int extlen = strlen(formats[index].extension);
+    int flen = strlen(fname);
+    if (!strcmp(fname + flen - extlen, formats[index].extension)) {
      return (*(formats[index].proc))(fname, fnum);
    }
  }
@@ -43,7 +43,8 @@ extern int  PropertyMerge(char *name, int fnum, char *key, int merge_type,
 		int merge_mask);
 extern void ResolveProperties(char *name1, int file1, char *name2, int file2);
 extern void CopyProperties(struct objlist *obj_to, struct objlist *obj_from);
-extern int PromoteProperty(struct property *, struct valuelist *);
+extern int PromoteProperty(struct property *, struct valuelist *,
+		struct objlist *, struct nlist *);
 extern int SetPropertyDefault(struct property *, struct valuelist *);
 extern struct objlist *LinkProperties(char *model, struct keyvalue *topptr);
 extern int ReduceExpressions(struct objlist *instprop, struct objlist *parprops,
@@ -149,6 +150,7 @@ extern int NoOutput;      /* set this to 1 to disable stdout output */
 extern int Composition;	  /* direction of composition */
 extern int UnixWildcards; /* TRUE if *,?,{},[] only; false if full REGEXP */
 extern int GlobalParallelNone;	/* If TRUE, don't parallel combine any cells */
+extern int GlobalParallelOpen;	/* If TRUE, parallel combine cells w/no-connects */
 /* magic internal flag to restrict searches to recently placed cells */
 extern int QuickSearch;
 /* does re"CellDef"ing a cell add to it or overwrite it??? */
@@ -22,6 +22,7 @@ the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */

 #include <stdio.h>
 #include <ctype.h>
+#include <limits.h>
 #ifdef IBMPC
 #include <alloc.h>
 #endif
@@ -31,13 +32,13 @@ the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
 #endif

 #include "netgen.h"
-#include "hash.h"
 #include "objlist.h"
 #include "regexp.h"
 #include "dbug.h"
 #include "print.h"
 #include "netfile.h"
 #include "netcmp.h"
+#include "hash.h"

 #ifdef TCL_NETGEN
 extern Tcl_Interp *netgeninterp;
@@ -288,7 +289,7 @@ static struct hashdict cell_dict;

 void InitCellHashTable(void)
 {
-    hashfunc = hash;
+    hashfunc = hashcase;
    matchfunc = NULL;
    matchintfunc = matchfile;
    InitializeHashTable(&cell_dict, CELLHASHSIZE);
@@ -975,6 +976,7 @@ struct objlist *CopyObjList(struct objlist *oldlist, unsigned char doforall)
          newob->model.class = NULL;
       else
          newob->model.class = strsave(tmp->model.class);
+       newob->flags = tmp->flags;
       newob->instance.name = (tmp->instance.name) ?
 		strsave(tmp->instance.name) : NULL;
    }
@@ -28,6 +28,8 @@

 #define PROXY (0)		/* Used in model.port record of ports */

+#define NO_CONNECT	1	/* Use in object list to flag an isolated net */
+
 /* Lists of device properties.  Order is defined at the time of	*/
 /* the cell definition; values are sorted at the time instances	*/
 /* are read.							*/
@@ -162,6 +164,7 @@ struct objlist {
 				/* (string) value of property for properties */
     struct valuelist *props;	/* Property record */
  } instance;
+  unsigned char flags;	/* Used by NODE type to flag isolated net */
  int node;		/* the electrical node number of the port/node/pin */
  struct objlist *next;
 };
@@ -309,6 +312,19 @@ extern void GarbageCollect(void);
 extern void InitGarbageCollection(void);
 extern void AddToGarbageList(struct objlist *head);

+extern void DeleteProperties(struct keyvalue **topptr);
+extern void AddProperty(struct keyvalue **topptr, char *key, char *value);
+extern void AddScaledProperty(struct keyvalue **topptr, char *key, char *value, double scale);
+extern void DeleteProperties(struct keyvalue **topptr);
+extern struct objlist *LinkProperties(char *model, struct keyvalue *topptr);
+
+extern void ClassDelete(char *class, int file);
+extern void RemoveShorted(char *class, int file);
+extern void CellRehash(char *name, char *newname, int file);
+
+/* defined in netgen.c */
+extern int ConvertStringToInteger(char *string, int *ival);
+
 #ifdef HAVE_MALLINFO
 void PrintMemoryStats(void);
 #endif
@@ -805,11 +805,14 @@ void DescribeInstance(char *name, int file)
      /* All black-box modules and placeholders by definition have all	*/
      /* disconnected pins, so don't report those.			*/

-      if (!(tp->flags & CELL_PLACEHOLDER) && (tp->class != CLASS_MODULE))
-      {
-	if (disconnectednodes == 0) Fprintf(stderr, "\n");
+      if ((!(tp->flags & CELL_PLACEHOLDER)) && (tp->class != CLASS_MODULE)) {
+	// if (disconnectednodes == 0) Fprintf(stderr, "\n");
        disconnectednodes++;
-        Fprintf(stderr, "Cell %s disconnected node: %s\n", tp->name, ob->name);
+	/* Don't report on ports marked "port_match_error", which is just confusing. */
+	if (strcmp(ob->name, "port_match_error")) {
+           Fprintf(stderr, "Cell %s (%d) disconnected node: %s\n",
+		    tp->name, tp->file, ob->name);
+	}
      }
    }
  }
@@ -1033,7 +1036,7 @@ void Query(void)
      break;
    case 'v':
      promptstring("Write Verilog: circuit name: ", repstr);
-      VerilogModule(repstr, filenum, "");
+      VerilogTop(repstr, filenum, "");
      break;
    case 'E':
      promptstring("Write ESACAP: circuit name: ", repstr);
@@ -26,6 +26,7 @@ the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
 #endif

 #include <stdlib.h>  /* for calloc(), free(), getenv() */
+#include <ctype.h>  /* for toupper(), isascii() */
 #ifndef IBMPC
 #include <sys/types.h>	/* for getpwnam() tilde expansion */
 #include <pwd.h>
@@ -40,6 +41,8 @@ the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
 #include "objlist.h"
 #include "netfile.h"
 #include "print.h"
+#include "query.h"
+#include "objlist.h"

 // Global storage for parameters from .PARAM
 struct hashdict spiceparams;
@@ -937,7 +940,7 @@ skip_ends:
 	 goto baddevice;
      }

-      snprintf(instname, 255, "%s%s", model, inst);
+      snprintf(instname, 255, "%s:%s", model, inst);
      Cell(instname, model, collector, base, emitter);
      pobj = LinkProperties(model, kvlist);
      ReduceExpressions(pobj, NULL, CurrentCell, TRUE);
@@ -1010,7 +1013,7 @@ skip_ends:
 	 goto baddevice;
      }

-      snprintf(instname, 255, "%s%s", model, inst);
+      snprintf(instname, 255, "%s:%s", model, inst);
      Cell(instname, model, drain, gate, source, bulk);
      pobj = LinkProperties(model, kvlist);
      ReduceExpressions(pobj, NULL, CurrentCell, TRUE);
@@ -1101,7 +1104,7 @@ skip_ends:
 	   usemodel = 1;
 	}

-	snprintf(instname, 255, "%s%s", model, inst);
+	snprintf(instname, 255, "%s:%s", model, inst);
 	if (usemodel)
           Cell(instname, model, ctop, cbot);
 	else
@@ -1186,7 +1189,7 @@ skip_ends:
           else if (CountPorts(model, filenum) != 2) {
 	      /* Modeled device:  Make sure it has the right number of ports */
 	      Fprintf(stderr, "Device \"%s\" has wrong number of ports for a "
-			"resistor.\n");
+			"resistor.\n", model);
 	      goto baddevice;
           }
 	   usemodel = 1;
@@ -1194,7 +1197,7 @@ skip_ends:
 	else
 	   strcpy(model, "r");		/* Use default resistor model */

-	snprintf(instname, 255, "%s%s", model, inst);
+	snprintf(instname, 255, "%s:%s", model, inst);
 	if (usemodel)
 	   Cell(instname, model, rtop, rbot);
 	else
@@ -1252,7 +1255,7 @@ skip_ends:
 	 Fprintf(stderr, "Device \"%s\" has wrong number of ports for a diode.\n");
 	 goto baddevice;
      }
-      snprintf(instname, 255, "%s%s", model, inst);
+      snprintf(instname, 255, "%s:%s", model, inst);
      Cell(instname, model, anode, cathode);
      pobj = LinkProperties(model, kvlist);
      ReduceExpressions(pobj, NULL, CurrentCell, TRUE);
@@ -1331,7 +1334,7 @@ skip_ends:
 	else
 	   strcpy(model, "t");		/* Use default xline model */

-	snprintf(instname, 255, "%s%s", model, inst);
+	snprintf(instname, 255, "%s:%s", model, inst);

 	if (usemodel)
 	   Cell(instname, model, node1, node2, node3, node4);
@@ -1414,7 +1417,7 @@ skip_ends:
      else
 	 strcpy(model, "l");		/* Use default inductor model */

-      snprintf(instname, 255, "%s%s", model, inst);
+      snprintf(instname, 255, "%s:%s", model, inst);
      if (usemodel)
 	 Cell(instname, model, end_a, end_b);
      else
@@ -1726,7 +1729,7 @@ skip_ends:
      /* names.								  */

      if (strncmp(instancename, scan->name, strlen(scan->name))) {
-         snprintf(subcktname, 99, "%s%s", scan->name, instancename);
+         snprintf(subcktname, 99, "%s:%s", scan->name, instancename);
         strcpy(instancename, subcktname);
      }
      else {
@@ -0,0 +1,8 @@
+#ifndef _TECH_H
+#define _TECH_H
+
+extern int ActelLibPresent(void);
+extern void ActelLib(void);
+extern void VerilogTop(char *name, int fnum, char *filename);
+
+#endif /* _TECH_H */
@@ -52,21 +52,28 @@ the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
 #endif

 #include "netgen.h"
-#include "hash.h"
 #include "objlist.h"
 #include "netfile.h"
 #include "print.h"
+#include "hash.h"

 // See netfile.c for explanation of delimiters.  'X'
 // separates single-character delimiters from two-character delimiters.
 #define VLOG_DELIMITERS "X///**/#((**)X,;:(){}[]="
+#define VLOG_EQUATION_DELIMITERS "X///**/#((**)X,;:(){}[]=+-*/"
 #define VLOG_PIN_NAME_DELIMITERS "X///**/(**)X()"
 #define VLOG_PIN_CHECK_DELIMITERS "X///**/(**)X,;(){}"

+// Used by portelement structure "flags" record.
+#define PORT_NOT_FOUND	0
+#define PORT_FOUND	1
+
 // Global storage for verilog parameters
 struct hashdict verilogparams;
 // Global storage for verilog definitions
 struct hashdict verilogdefs;
+// Record file pointer that is associated with the hash tables
+int hashfile = -1;

 // Global storage for wire buses
 struct hashdict buses;
@@ -134,144 +141,142 @@ char *strvchr(char *string, char c)

 int GetBusTok(struct bus *wb)
 {
-    int result, start, end;
+    int result, start, end, value;
+    char oper;
    struct property *kl = NULL;

    if (wb == NULL) return 0;
-    else {
-        wb->start = -1;
-        wb->end = -1;
-    }
+
+    wb->start = -1;
+    wb->end = -1;
+
+    /* Parse a value for array bounds [a : b], including possible use	*/
+    /* of parameters, definitions, and basic arithmetic.		*/

    if (match(nexttok, "[")) {
-	SkipTokComments(VLOG_DELIMITERS);
-
-	result = sscanf(nexttok, "%d", &start);
-	if (result != 1) {
-	    char *aptr = NULL;
-	    char addin;
-
-	    // Check for "+/-(n)" at end of a parameter name
-	    aptr = strrchr(nexttok, '+');
-	    if (aptr == NULL) aptr = strrchr(nexttok, '-');
-	    if (aptr != NULL) {
-		addin = *aptr;
-		*aptr = '\0';
-	    }
-
-	    // Is name in the parameter list?
-	    kl = (struct property *)HashLookup(nexttok, &verilogparams);
-	    if (kl == NULL) {
-		Printf("Array value %s is not a number or a parameter.\n",
-				nexttok);
-		return 1;
-	    }
-	    else {
-		if (kl->type == PROP_STRING) {
-		    result = sscanf(kl->pdefault.string, "%d", &start);
-		    if (result != 1) {
-		        Printf("Parameter %s has value %s that cannot be parsed"
-				" as an integer.\n", nexttok, kl->pdefault.string);
-			return 1;
-		    }
-		}
-		else if (kl->type == PROP_INTEGER) {
-		    start = kl->pdefault.ival;
-		}
-		else if (kl->type == PROP_DOUBLE) {
-		    start = (int)kl->pdefault.dval;
-		    if ((double)start != kl->pdefault.dval) {
-		        Printf("Parameter %s has value %g that cannot be parsed"
-				" as an integer.\n", nexttok, kl->pdefault.dval);
-			return 1;
-		    }
-		}
-		else {
-		    Printf("Parameter %s has unknown type; don't know how"
-				" to parse.\n", nexttok);
+	start = end = -1;
+	oper = '\0';
+	while (nexttok) {
+	    SkipTokComments(VLOG_EQUATION_DELIMITERS);
+    	    if (match(nexttok, "]")) {
+	    	result = 1;
+		if (start == -1) {
+		    Printf("Empty array found.\n");
 		    return 1;
 		}
+		if (end == -1) end = start;	// Single bit
+		break;
 	    }
-	    if (aptr != NULL) {
-		int addval;
-		*aptr = addin;
-		if (sscanf(aptr + 1, "%d", &addval) != 1) {
-		    Printf("Unable to parse parameter increment '%s'\n", aptr);
+	    if (match(nexttok, ":")) {
+		if (start == -1) {
+		    Printf("Empty array start found.\n");
 		    return 1;
 		}
-		start += (addin == '+') ? addval : -addval;
-	    }
-	}
-	SkipTokComments(VLOG_DELIMITERS);
-	if (match(nexttok, "]")) {
-	    result = 1;
-	    end = start;	// Single bit
-	}
-	else if (!match(nexttok, ":")) {
-	    Printf("Badly formed array notation:  Expected colon, found %s\n", nexttok);
-	    return 1;
-	}
-	else {
-	    SkipTokComments(VLOG_DELIMITERS);
-
-	    result = sscanf(nexttok, "%d", &end);
-	    if (result != 1) {
-		char *aptr = NULL;
-		char addin;
-
-		// Check for "+/-(n)" at end of a parameter name
-		aptr = strrchr(nexttok, '+');
-		if (aptr == NULL) aptr = strrchr(nexttok, '-');
-		if (aptr != NULL) {
-		    addin = *aptr;
-		    *aptr = '\0';
+		if (oper != '\0') {
+		    Printf("Unfinished arithmetic operation found in array.\n");
+		    oper = '\0';
 		}
+		continue;
+	    }
+	    else if (match(nexttok, "+")) {
+		if (oper != '-') oper = *nexttok;
+		continue;
+	    }
+	    else if (match(nexttok, "-")) {
+		if (oper == '-') oper = '+';
+		else oper = *nexttok;
+		continue;
+	    }
+	    else if (match(nexttok, "*") || match(nexttok, "/")) {
+		oper = *nexttok;
+		continue;
+	    }
+	    else if (match(nexttok, "(") || match(nexttok, ")")) {
+		/* To do:  Track expression nesting */
+		continue;
+	    }
+	    if ((result = sscanf(nexttok, "%d", &value)) != 1) {

 		// Is name in the parameter list?
-	        kl = (struct property *)HashLookup(nexttok, &verilogparams);
+		kl = (struct property *)HashLookup(nexttok, &verilogparams);
 		if (kl == NULL) {
 		    Printf("Array value %s is not a number or a parameter.\n",
-					nexttok);
-		    return 1;
+				nexttok);
+		    value = 0;
+		    break;
 		}
 		else {
 		    if (kl->type == PROP_STRING) {
-			result = sscanf(kl->pdefault.string, "%d", &end);
+			result = sscanf(kl->pdefault.string, "%d", &value);
 			if (result != 1) {
 		            Printf("Parameter %s has value %s that cannot be parsed"
-					" as an integer.\n", nexttok,
-					kl->pdefault.string);
-			    return 1;
+					" as an integer.\n",
+					nexttok, kl->pdefault.string);
+		    	    value = 0;
+			    break;
 			}
 		    }
 		    else if (kl->type == PROP_INTEGER) {
-			end = kl->pdefault.ival;
+			value = kl->pdefault.ival;
 		    }
 		    else if (kl->type == PROP_DOUBLE) {
-		        end = (int)kl->pdefault.dval;
-		        if ((double)end != kl->pdefault.dval) {
-			    Printf("Cannot parse second digit from parameter "
-					"%s value %g\n", nexttok, kl->pdefault.dval);
-			    return 1;
+			value = (int)kl->pdefault.dval;
+			if ((double)value != kl->pdefault.dval) {
+		            Printf("Parameter %s has value %g that cannot be parsed"
+					" as an integer.\n",
+					nexttok, kl->pdefault.dval);
+		    	    value = 0;
+			    break;
 			}
 		    }
 		    else {
-		        Printf("Parameter %s has unknown type; don't know how"
-					" to parse.\n", nexttok);
-		        return 1;
+			Printf("Parameter %s has unknown type; don't know how"
+				" to parse.\n", nexttok);
+		    	value = 0;
+			break;
 		    }
 		}
-		if (aptr != NULL) {
-		    int addval;
-		    *aptr = addin;
-		    if (sscanf(aptr + 1, "%d", &addval) != 1) {
-			Printf("Unable to parse parameter increment '%s'\n", aptr);
-			return 1;
-		    }
-		    end += (addin == '+') ? addval : -addval;
-		}
 	    }
+	    switch (oper) {
+		case '\0':
+		    if (start == -1)
+			start = value;
+		    else
+			end = value;
+		    break;
+		case '+':
+		    if (end == -1)
+			start += value;
+		    else
+			end += value;
+		    break;
+		case '-':
+		    if (end == -1)
+		        start -= value;
+		    else
+		        end -= value;
+		    break;
+		case '*':
+		    if (end == -1)
+			start *= value;
+		    else
+			end *= value;
+		    break;
+		case '/':
+		    if (value == 0) {
+			Printf("Divide by zero in array expression.\n");
+		    }
+		    else {
+			if (end == -1)
+			    start /= value;
+			else
+			    end /= value;
+		    }
+		    break;
+	    }
+	    oper = '\0';
 	}
+
 	wb->start = start;
 	wb->end = end;

@@ -1124,13 +1129,6 @@ skip_endmodule:
 	 kl->pdefault.ival = 1;
         kl->slop.ival = 0;
      }
-      else if (nexttok[0] == '(') {
-	 /* For now, the netgen verilog parser doesn't handle `define f(X) ... */
-	 SkipNewLine(VLOG_DELIMITERS);
-	 FREE(kl->key);
-	 FREE(kl);
-	 kl = NULL;
-      }
      else if (ConvertStringToInteger(nexttok, &ival) == 1) {
 	 /* Parameter parses as an integer */
      	 kl->type = PROP_INTEGER;
@@ -1404,6 +1402,7 @@ skip_endmodule:
 	char *name;	// Name of port in subcell
 	char *net;	// Name of net connecting to port in the parent
 	int   width;	// Width of port, if port is a bus
+	char  flags;	// Used for marking if port was added into netlist
 	struct portelement *next;
      };

@@ -1530,6 +1529,7 @@ nextinst:
 	       new_port = (struct portelement *)CALLOC(1, sizeof(struct portelement));
 	       new_port->name = strsave(nexttok + 1);
 	       new_port->width = -1;
+	       new_port->flags = PORT_NOT_FOUND;
 	       SkipTokComments(VLOG_DELIMITERS);
 	       if (!match(nexttok, "(")) {
 	           Printf("Badly formed subcircuit pin line at \"%s\"\n", nexttok);
@@ -1571,6 +1571,14 @@ nextinst:
 		     }
 		     new_port->net = wire_bundle;
 		  }
+		  else if (nexttok[0] == '~' || nexttok[0] == '!' || nexttok[0] == '-') {
+		     /* All of these imply that the signal is logically manipulated */
+		     /* in turn implying behavioral code.			    */
+		     Printf("Module '%s' is not structural verilog, "
+				    "making black-box.\n", model);
+		     SetClass(CLASS_MODULE);
+		     goto skip_endmodule;
+		  }
 		  else
 		     new_port->net = strsave(nexttok);

@@ -1764,54 +1772,6 @@ nextinst:
 	    scan->width = width;

 	    result = GetBus(scan->net, &wb);
-	    if (result == -1) {
-		/* CHECK:  THIS CODE SHOULD BE DELETED, IT IS NOT THE ISSUE */
-		/* Not bus notation, but check if signal was defined as a bus */
-		wb.start = wb.end = -1;
-		minnet = maxnet = -1;
-
-		/* Pins should be in index order start->end.  Other nodes */
-		/* should be in order start->end by node number.	  */
-
-		for (bobj = CurrentCell->cell; bobj; bobj = bobj->next) {
-		    if (bobj->type == PORT) {
-			if ((bptr = strvchr(bobj->name, '[')) != NULL) {
-			    *bptr = '\0';
-			    if (!strcmp(bobj->name, scan->net)) {
-				*bptr = '[';
-				if (wb.start == -1)
-				    sscanf(bptr + 1, "%d", &wb.start);
-				else
-				    sscanf(bptr + 1, "%d", &wb.end);
-			    }
-			}
-		    }
-		    else if (bobj->type == NODE) {
-			if ((bptr = strvchr(bobj->name, '[')) != NULL) {
-			    *bptr = '\0';
-			    if (!strcmp(bobj->name, scan->net)) {
-				if (sscanf(bptr + 1, "%d", &testidx) == 1) {
-				    if (minnet == -1) {
-					minnet = maxnet = bobj->node;
-					wb.start = wb.end = testidx;
-				    }
-				    else if (bobj->node < minnet) {
-					minnet = bobj->node;
-					wb.start = testidx;
-				    }
-				    else if (bobj->node > maxnet) {
-					maxnet = bobj->node;
-					wb.end = testidx;
-				    }
-				}
-			    }
-			    *bptr = '[';
-			}
-		    }
-		}
-		if (wb.start != -1) result = 0;
-	    }
-
 	    if (result == 0) {
 	       int match = 0;
 	       int wblen, arraylen;
@@ -1921,7 +1881,25 @@ nextinst:
 	       }
 	    }
 	    else if (portstart != portend) {
-	       Fprintf(stderr, "Error:  Single net %s is connected to bus port %s\n",
+	       /* If the name starts with "_noconnect_", then it was an
+		* auto-generated name that incorrectly assumed a single-bit
+		* wide signal because it did not have a module prototype.
+		* Rewrite the noconnect name as an array.  This just means
+		* that the verilog had an empty list "()" and the initial
+		* assumption was wrong.  If not all instances agree on the
+		* size, then this will eventually generate an error.
+		*/
+	       if (!strncmp(scan->net, "_noconnect_", 11) &&
+			(strchr(scan->net, '\[') == NULL) && (width > 1)) {
+		  char *savenet = scan->net;
+		  char *newnet = MALLOC(strlen(scan->net) + 12);
+		  sprintf(newnet, "%s[%d:0]", scan->net, scan->width - 1);
+		  FREE(savenet);
+		  scan->net = newnet;
+		  continue;	/* Re-process this entry */
+	       }
+	       else
+	          Fprintf(stderr, "Error:  Single net %s is connected to bus port %s\n",
 			scan->net, scan->name);
 	    }
 	 }
@@ -1964,6 +1942,7 @@ nextinst:
 	       obpinidx = -1;
 	       while (scan != NULL) {
 		  if (match(obpinname, scan->name)) {
+		     scan->flags |= PORT_FOUND;
 		     break;
 		  }
 		  scan = scan->next;
@@ -2056,6 +2035,89 @@ nextinst:
 	           if (LookupObject(scan->net, CurrentCell) == NULL) Node(scan->net);
 	           join(scan->net, obptr->name);
 	       }
+
+	       /* Before exiting the loop, check if all ports in the	*/
+	       /* scan list were handled.				*/
+
+	       if ((obptr->next == NULL) || (obptr->next->type <= FIRSTPIN)) {
+	          for (scan = head; scan; scan = scan->next) {
+	             if (!(scan->flags & PORT_FOUND)) {
+		        if (tp->flags & CELL_PLACEHOLDER) {
+			   char tempname[128];
+			   int maxnode;
+
+		           /* This pin was probably implicit in the first call */
+		           /* and so it needs to be added to the definition.	 */
+
+			   ReopenCellDef(modulename, filenum);
+		           Port(scan->name);
+			   ReopenCellDef((*CellStackPtr)->cellname, filenum);
+
+			   /* obptr->next now gets the new port.  Update the	*/
+			   /* port number, and copy class and instance name.	*/
+			   nobj = GetObject();
+			   sprintf(tempname, "%s%s%s", obptr->instance.name,
+						SEPARATOR, scan->name);
+			   nobj->name = strsave(tempname);
+			   nobj->model.class = strsave(obptr->model.class);
+			   nobj->instance.name = strsave(obptr->instance.name);
+			   nobj->type = obptr->type + 1;
+			   nobj->next = obptr->next;
+			   nobj->node = -1;
+			   obptr->next = nobj;
+      			   HashPtrInstall(nobj->name, nobj, &(CurrentCell->objdict));
+
+	           	   if (LookupObject(scan->net, CurrentCell) == NULL)
+			      Node(scan->net);
+	           	   join(scan->net, nobj->name);
+	             	   scan->flags |= PORT_FOUND;
+
+			   /* Now any previous instance of the same cell must	*/
+			   /* insert the same additional pin as a no-connect.	*/
+			   /* NOTE:  This should be running a callback on all	*/
+			   /* cells in the file, not just CurrentCell.		*/
+
+			   for (sobj = CurrentCell->cell; sobj && (sobj != obptr);
+					sobj = sobj->next) {
+			      if (sobj->type == FIRSTPIN) {
+				 if (match(sobj->model.class, obptr->model.class)) {
+				    while (sobj->next && (sobj->next->type > FIRSTPIN))
+				       sobj = sobj->next;
+				    /* Stop when reaching the current instance */
+				    if (sobj->type == obptr->type + 1) break;
+				    nobj = GetObject();
+				    sprintf(tempname, "%s%s%s", sobj->instance.name,
+						SEPARATOR, scan->name);
+				    nobj->name = strsave(tempname);
+				    nobj->model.class = strsave(sobj->model.class);
+				    nobj->instance.name = strsave(sobj->instance.name);
+				    nobj->type = obptr->type + 1;
+				    nobj->node = -1;
+				    nobj->next = sobj->next;
+				    sobj->next = nobj;
+      				    HashPtrInstall(nobj->name, nobj,
+							&(CurrentCell->objdict));
+
+		  	   	    sprintf(tempname, "_noconnect_%d_", localcount++);
+		  	   	    Node(tempname);
+		  	   	    join(tempname, nobj->name);
+		  	   	    Fprintf(stderr, "Note:  Implicit pin %s in instance "
+						"%s of %s in cell %s\n",
+			 			scan->name, sobj->instance.name,
+						modulename, CurrentCell->name);
+				 }
+			      }
+			   }
+		        }
+		        else {
+		           Fprintf(stderr, "Error:  Instance %s has pin %s which is "
+					"not in the %s cell definition.\n",
+					locinst, scan->name, modulename);
+		        }
+	             }
+	          }
+	       }
+
 	       obptr = obptr->next;
            } while (obptr != NULL && obptr->type > FIRSTPIN);
 	 }
@@ -2141,11 +2203,22 @@ char *ReadVerilogTop(char *fname, int *fnum, int blackbox)
  else {
     matchfunc = match;
     matchintfunc = matchfile;
-     hashfunc = hash;
+     hashfunc = hashcase;
  }

-  InitializeHashTable(&verilogparams, OBJHASHSIZE);
-  InitializeHashTable(&verilogdefs, OBJHASHSIZE);
+  if ((hashfile != -1) && (hashfile != *fnum)) {
+      /* Started a new file, so remove all the parameters and definitions */
+      RecurseHashTable(&verilogparams, freeprop);
+      HashKill(&verilogparams);
+      RecurseHashTable(&verilogdefs, freeprop);
+      HashKill(&verilogdefs);
+      hashfile = -1;
+  }
+  if (hashfile == -1) {
+      InitializeHashTable(&verilogparams, OBJHASHSIZE);
+      InitializeHashTable(&verilogdefs, OBJHASHSIZE);
+      hashfile = *fnum;
+  }
  definitions = &verilogdefs;

  /* Add the pre-defined key "LVS" to verilogdefs */
@@ -2165,10 +2238,6 @@ char *ReadVerilogTop(char *fname, int *fnum, int blackbox)
  // Cleanup
  while (CellStack != NULL) PopStack(&CellStack);

-  RecurseHashTable(&verilogparams, freeprop);
-  HashKill(&verilogparams);
-  RecurseHashTable(&verilogdefs, freeprop);
-  HashKill(&verilogdefs);
  definitions = (struct hashdict *)NULL;

  // Record the top level file.
@@ -23,6 +23,7 @@ the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
 #include <stdio.h>
 #include <stdarg.h>
 #include <ctype.h>
+#include <time.h>

 #ifdef IBMPC
 #include <stdlib.h>  /* for strtol on PC */
@@ -33,6 +34,8 @@ the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
 #include "netfile.h"
 #include "hash.h"
 #include "print.h"
+#include "xilinx.h"
+#include "flatten.h"

 #define XILINXHASHSIZE 99
 static long xilinxhashbase = 0xA00;
@@ -132,10 +135,8 @@ char *xilinx_class(model)
 	}
 	return(model);
 }
-void
-Xilinx(cellname, filename)
-	char *cellname;
-	char *filename;
+
+void Xilinx(char *cellname, char *filename)
 {
 	char Path[500];
 	char FileName[500];
@@ -163,8 +164,7 @@ Xilinx(cellname, filename)
 	CloseFile(FileName);
 }

-xilinxCell(cell)
-	char *cell;
+int xilinxCell(char *cell)
 {
 	struct nlist *nl;
 	struct objlist *ob;
@@ -252,9 +252,7 @@ struct objlist *xilinx_gate(ob,nl)
 	return(nob);
 }

-xilinx_sym(nl,gob)
-	struct nlist *nl;
-	struct objlist *gob;
+void xilinx_sym(struct nlist *nl, struct objlist *gob)
 {
 	struct objlist *ob;
 	char *cp,*rindex();
@@ -0,0 +1,10 @@
+#ifndef _XILINX_H
+#define _XILINX_H
+
+extern void xilinx_sym(struct nlist *nl, struct objlist *gob);
+extern void Xilinx(char *cellname, char *filename);
+extern int xilinxCell(char *cell);
+extern int XilinxLibPresent(void);
+extern void XilinxLib(void);
+
+#endif /* _XILINX_H */
@@ -8,6 +8,8 @@ SCRIPTINSTALL = $(DESTDIR)${INSTALL_PYDIR}

 include ${NETGENDIR}/defs.mak

+CLEANS += lvs_manager.py
+
 main: lvs_manager.py

 tcl-main: lvs_manager.py
@@ -27,6 +29,7 @@ lvs_manager.py: lvs_manager.py.in
 $(DESTDIR)${INSTALL_PYDIR}/lvs_manager.py: lvs_manager.py
 	${RM} $@
 	${CP} lvs_manager.py $@
+	chmod a+x $@

 $(DESTDIR)${INSTALL_PYDIR}/treeviewsplit.py: treeviewsplit.py
 	${RM} $@
@@ -1,819 +0,0 @@
-#!/bin/env python3
-#
-#--------------------------------------------------------
-# LVS Manager GUI.
-#
-# This is a Python tkinter script that handles the
-# process of running LVS and interpreting results.
-#
-#--------------------------------------------------------
-# Written by Tim Edwards
-# efabless, inc.
-# Version 1.  November 30, 2016
-# Version 2.  March 6, 2017.  Reads JSON format output
-# Version 3.  April 25, 2018. Handles layout vs. verilog
-#--------------------------------------------------------
-
-import io
-import os
-import re
-import sys
-import json
-import shutil
-import signal
-import socket
-import select
-import datetime
-import contextlib
-import subprocess
-
-import tkinter
-from tkinter import ttk
-from tkinter import filedialog
-
-import tksimpledialog
-import tooltip
-from consoletext import ConsoleText
-from helpwindow import HelpWindow
-from treeviewsplit import TreeViewSplit
-
-# User preferences file (if it exists)
-prefsfile = '~/.profile/prefs.json'
-
-netgen_script_dir = '/usr/local/lib/netgen/python'
-
-#------------------------------------------------------
-# Simple dialog for confirming quit
-#------------------------------------------------------
-
-class ConfirmDialog(tksimpledialog.Dialog):
-    def body(self, master, warning, seed):
-        if warning:
-            ttk.Label(master, text=warning, wraplength=500).grid(row = 0, columnspan = 2, sticky = 'wns')
-        return self
-
-    def apply(self):
-        return 'okay'
-
-#------------------------------------------------------
-# Main class for this application
-#------------------------------------------------------
-
-class LVSManager(ttk.Frame):
-    """LVS Manager GUI."""
-
-    def __init__(self, parent, *args, **kwargs):
-        ttk.Frame.__init__(self, parent, *args, **kwargs)
-        self.root = parent
-        self.init_gui()
-        parent.protocol("WM_DELETE_WINDOW", self.on_quit)
-
-    def on_quit(self):
-        """Exits program."""
-        if self.msock:
-            self.msock.close()
-        quit()
-
-    def init_gui(self):
-        """Builds GUI."""
-        global prefsfile
-
-        message = []
-        fontsize = 11
-
-        # Read user preferences file, get default font size from it.
-        prefspath = os.path.expanduser(prefsfile)
-        if os.path.exists(prefspath):
-            with open(prefspath, 'r') as f:
-                self.prefs = json.load(f)
-            if 'fontsize' in self.prefs:
-                fontsize = self.prefs['fontsize']
-        else:
-            self.prefs = {}
-
-        s = ttk.Style()
-
-        available_themes = s.theme_names()
-        s.theme_use(available_themes[0])
-
-        s.configure('bg.TFrame', background='gray40')
-        s.configure('italic.TLabel', font=('Helvetica', fontsize, 'italic'))
-        s.configure('title.TLabel', font=('Helvetica', fontsize, 'bold italic'),
-                        foreground = 'brown', anchor = 'center')
-        s.configure('normal.TLabel', font=('Helvetica', fontsize))
-        s.configure('red.TLabel', font=('Helvetica', fontsize), foreground = 'red')
-        s.configure('green.TLabel', font=('Helvetica', fontsize), foreground = 'green3')
-        s.configure('blue.TLabel', font=('Helvetica', fontsize), foreground = 'blue')
-        s.configure('normal.TButton', font=('Helvetica', fontsize),
-                        border = 3, relief = 'raised')
-        s.configure('red.TButton', font=('Helvetica', fontsize), foreground = 'red',
-                        border = 3, relief = 'raised')
-        s.configure('green.TButton', font=('Helvetica', fontsize), foreground = 'green3',
-                        border = 3, relief = 'raised')
-        s.configure('blue.TButton', font=('Helvetica', fontsize), foreground = 'blue',
-                        border = 3, relief = 'raised')
-        s.configure('redtitle.TButton', font=('Helvetica', fontsize, 'bold italic'),
-                        foreground = 'red', border = 3, relief = 'raised')
-        s.configure('bluetitle.TButton', font=('Helvetica', fontsize, 'bold italic'),
-                        foreground = 'blue', border = 3, relief = 'raised')
-
-        # These values to be overridden from arguments
-        self.rootpath = None
-        self.project = None
-        self.logfile = None
-        self.msock = None
-        self.help = None
-
-        # Create the help window
-        if os.path.exists(netgen_script_dir + '/netgen_help.txt'):
-            self.help = HelpWindow(self, fontsize = fontsize)
-            with io.StringIO() as buf, contextlib.redirect_stdout(buf):
-                self.help.add_pages_from_file('lvs_help.txt')
-                message = buf.getvalue()
-
-            # Set the help display to the first page
-            self.help.page(0)
-
-        # Variables used by option menus and other stuff
-        self.project = "(no selection)"
-        self.layout = "(default)"
-        self.schematic = "(default)"
-        self.tech = "(none)"
-        self.lvs_setup = ''
-        self.lvsdata = {}
-
-        # Root window title
-        self.root.title('LVS Manager')
-        self.root.option_add('*tearOff', 'FALSE')
-        self.pack(side = 'top', fill = 'both', expand = 'true')
-
-        pane = tkinter.PanedWindow(self, orient = 'vertical', sashrelief='groove', sashwidth=6)
-        pane.pack(side = 'top', fill = 'both', expand = 'true')
-        self.toppane = ttk.Frame(pane)
-        self.botpane = ttk.Frame(pane)
-
-        # Get username
-        if 'username' in self.prefs:
-            username = self.prefs['username']
-        else:
-            username = os.environ['USER']
-
-        # Label with the user
-        self.toppane.title_frame = ttk.Frame(self.toppane)
-        self.toppane.title_frame.pack(side = 'top', fill = 'x')
-
-        self.toppane.title_frame.title = ttk.Label(self.toppane.title_frame, text='User:', style = 'red.TLabel')
-        self.toppane.title_frame.user = ttk.Label(self.toppane.title_frame, text=username, style = 'blue.TLabel')
-
-        self.toppane.title_frame.title.grid(column=0, row=0, ipadx = 5)
-        self.toppane.title_frame.user.grid(column=1, row=0, ipadx = 5)
-
-        self.toppane.title2_frame = ttk.Frame(self.toppane)
-        self.toppane.title2_frame.pack(side = 'top', fill = 'x')
-        self.toppane.title2_frame.project_label = ttk.Label(self.toppane.title2_frame, text="Project:",
-                style = 'title.TLabel')
-        self.toppane.title2_frame.project_label.grid(column=0, row=0, ipadx = 5)
-
-        # New project select button
-        self.toppane.title2_frame.project_select = ttk.Button(self.toppane.title2_frame,
-                text=self.project, style='normal.TButton', command=self.choose_project)
-        self.toppane.title2_frame.project_select.grid(column=1, row=0, ipadx = 5)
-
-        tooltip.ToolTip(self.toppane.title2_frame.project_select,
-                        text = "Select new project")
-
-        # Show path to project
-        self.toppane.title2_frame.path_label = ttk.Label(self.toppane.title2_frame, text=self.project,
-                style = 'normal.TLabel')
-        self.toppane.title2_frame.path_label.grid(column=2, row=0, ipadx = 5, padx = 10)
-
-        # Show top-level layout cellname with select button.  Initial cell name is the top-level cell.
-        self.toppane.title2_frame.tech_label = ttk.Label(self.toppane.title2_frame, text="Technology setup:",
-                style = 'title.TLabel')
-
-        self.toppane.title2_frame.tech_label.grid(column=3, row=0, ipadx = 5)
-        self.toppane.title2_frame.tech_select = ttk.Button(self.toppane.title2_frame,
-                text=self.tech, style='normal.TButton', command=self.choose_tech)
-        self.toppane.title2_frame.tech_select.grid(column=4, row=0, ipadx = 3, padx = 3)
-
-        self.toppane.title2_frame.layout_label = ttk.Label(self.toppane.title2_frame, text="Layout:",
-                style = 'title.TLabel')
-        self.toppane.title2_frame.layout_label.grid(column=0, row=1, ipadx = 5)
-        self.toppane.title2_frame.layout_select = ttk.Button(self.toppane.title2_frame,
-                text=self.layout, style='normal.TButton', command=self.choose_layout)
-        self.toppane.title2_frame.layout_select.grid(column=1, row=1, ipadx = 3, padx = 3)
-
-        # Show top-level schematic cellname with select button.  Initial cell name is the top-level cell.
-        self.toppane.title2_frame.schem_label = ttk.Label(self.toppane.title2_frame, text="Schematic:",
-                style = 'title.TLabel')
-        self.toppane.title2_frame.schem_label.grid(column=3, row=1, ipadx = 5)
-        self.toppane.title2_frame.schem_select = ttk.Button(self.toppane.title2_frame,
-                text=self.schematic, style='normal.TButton', command=self.choose_netlist)
-        self.toppane.title2_frame.schem_select.grid(column=4, row=1, ipadx = 3, padx = 3)
-
-        tooltip.ToolTip(self.toppane.title2_frame.project_select,
-                        text = "Select new project")
-        tooltip.ToolTip(self.toppane.title2_frame.layout_select,
-                        text = "Select a layout subcirucit to compare")
-        tooltip.ToolTip(self.toppane.title2_frame.schem_select,
-                        text = "Select a schematic subcirucit to compare")
-
-        #---------------------------------------------
-        ttk.Separator(self.toppane, orient='horizontal').pack(side = 'top', fill = 'x')
-        #---------------------------------------------
-
-        # Create listbox of Circuit1 vs. Circuit2 results
-        height = 10
-        self.toppane.lvsreport = TreeViewSplit(self.toppane, fontsize = fontsize)
-        self.toppane.lvsreport.populate("Layout:", [], "Schematic:", [],
-			[["Run", True, self.run_lvs],
-			# ["Find", True, self.findrecord]
-			], height = height)
-        self.toppane.lvsreport.set_title("Line")
-        self.toppane.lvsreport.pack(side = 'top', fill = 'both', expand = 'true')
-
-        tooltip.ToolTip(self.toppane.lvsreport.get_button(0), text="Run LVS")
-
-        #---------------------------------------------
-        # ttk.Separator(self, orient='horizontal').grid(column=0, row=3, sticky='ew')
-        #---------------------------------------------
-
-        # Add a text window below the project name to capture output.  Redirect
-        # print statements to it.
-
-        self.botpane.console = ttk.Frame(self.botpane)
-        self.botpane.console.pack(side = 'top', fill = 'both', expand = 'true')
-
-        self.text_box = ConsoleText(self.botpane.console, wrap='word', height = 4)
-        self.text_box.pack(side='left', fill='both', expand='true')
-        console_scrollbar = ttk.Scrollbar(self.botpane.console)
-        console_scrollbar.pack(side='right', fill='y')
-        # attach console to scrollbar
-        self.text_box.config(yscrollcommand = console_scrollbar.set)
-        console_scrollbar.config(command = self.text_box.yview)
-
-        # Add button bar at the bottom of the window
-        self.botpane.bbar = ttk.Frame(self.botpane)
-        self.botpane.bbar.pack(side = 'top', fill = 'x')
-
-        # Define the "quit" button and action
-        self.botpane.bbar.quit_button = ttk.Button(self.botpane.bbar, text='Quit', command=self.on_quit,
-                style = 'normal.TButton')
-        self.botpane.bbar.quit_button.grid(column=0, row=0, padx = 5)
-
-        # Define help button
-        if self.help:
-            self.botpane.bbar.help_button = ttk.Button(self.botpane.bbar, text='Help',
-		command=self.help.open, style = 'normal.TButton')
-            self.botpane.bbar.help_button.grid(column = 2, row = 0, padx = 5)
-            tooltip.ToolTip(self.botpane.bbar.help_button, text = "Show help window")
-
-        # Add the panes once the internal geometry is known.
-        pane.add(self.toppane)
-        pane.add(self.botpane)
-        pane.paneconfig(self.toppane, stretch='first')
-
-        # Redirect stdout and stderr to the console as the last thing to do. . .
-        # Otherwise errors in the GUI get sucked into the void.
-
-        self.stdout = sys.stdout
-        self.stderr = sys.stderr
-        sys.stdout = ConsoleText.StdoutRedirector(self.text_box)
-        sys.stderr = ConsoleText.StderrRedirector(self.text_box)
-
-        if message:
-            print(message)
-
-    def logprint(self, message, doflush=False):
-        if self.logfile:
-            self.logfile.buffer.write(message.encode('utf-8'))
-            self.logfile.buffer.write('\n'.encode('utf-8'))
-            if doflush:
-                self.logfile.flush()
-
-    def printout(self, output):
-        # Generate output
-        if not output:
-            return
-
-        outlines = output.splitlines()
-        for line in outlines:
-            try:
-                print(line)
-            except TypeError:
-                line = line.decode('utf-8')
-                pritn(line)
-
-    def printwarn(self, output):
-        # Check output for warning or error
-        if not output:
-            return 0
-
-        warnrex = re.compile('.*warning', re.IGNORECASE)
-        errrex = re.compile('.*error', re.IGNORECASE)
-
-        errors = 0
-        outlines = output.splitlines()
-        for line in outlines:
-            try:
-                wmatch = warnrex.match(line)
-            except TypeError:
-                line = line.decode('utf-8')
-                wmatch = warnrex.match(line)
-            ematch = errrex.match(line)
-            if ematch:
-                errors += 1
-            if ematch or wmatch:
-                print(line)
-        return errors
-
-    def choose_tech(self):
-        try:
-            project_path = self.rootpath
-            initdirname = self.rootpath + '/tech',
-        except:
-            print('Must choose a project first.')
-            return
-        techname = filedialog.askopenfilename(multiple=False,
-			initialdir = initdirname,
-			filetypes = (("Tcl script", "*.tcl"),("All Files","*.*")),
-			title = "Choose a netgen technology setup script.")
-        if techname != '':
-            print("Selected technology setup script " + techname)
-            techbase = os.path.split(techname)[1]
-            self.tech = os.path.splitext(techbase)[0]
-            self.lvs_setup = techname
-            self.toppane.title2_frame.layout_select.config(text = self.tech)
-
-    def choose_layout(self):
-        try:
-            project_path = self.rootpath
-            initdirname = self.rootpath + '/layout',
-        except:
-            print('Must choose a project first.')
-            return
-        cellname = filedialog.askopenfilename(multiple=False,
-			initialdir = initdirname,
-			filetypes = (("Magic layout", "*.mag"),("All Files","*.*")),
-			title = "Choose a layout cell to compare.")
-        if cellname != '':
-            print("Selected compare cell " + cellname)
-            cellbase = os.path.split(cellname)[1]
-            self.layout = os.path.splitext(cellbase)[0]
-            self.toppane.title2_frame.layout_select.config(text = self.layout)
-
-    def choose_netlist(self):
-        try:
-            project_path = self.rootpath
-            initdirname = self.rootpath + '/netlist/' + self.project + '.spi'
-        except:
-            print('Must choose a project first.')
-            return
-        cellname = filedialog.askopenfilename(multiple=False,
-			initialdir = initdirname,
-			filetypes = (("Spice netlist", "*.spi"),("Verilog netlist", "*.v")),
-			title = "Choose a netlist to compare.")
-        if cellname != '':
-            print("Selected compare cell " + cellname)
-            cellbase = os.path.split(cellname)[1]
-            self.schematic = os.path.splitext(cellbase)[0]
-            self.toppane.title2_frame.schem_select.config(text = self.schematic)
-            fileext = os.path.splitext(cellbase)[1]
-            if fileext == '.v':
-                self.toppane.title2_frame.schem_label.config(text = 'Verilog netlist:')
-            elif fileext == '.sp' or fileext == '.spi' or fileext == '.spice' or fileext == '.spc' or fileext == '.ckt':
-                self.toppane.title2_frame.schem_label.config(text = 'SPICE netlist:')
-            elif fileext == '.cdl':
-                self.toppane.title2_frame.schem_label.config(text = 'CDL netlist:')
-            else:
-                self.toppane.title2_frame.schem_label.config(text = 'Unknown netlist:')
-
-    def choose_project(self):
-        project = filedialog.askdirectory(initialdir = os.getcwd(),
-			title = "Find a project.")
-        if project != '':
-            print("Selected project " + str(project))
-            result = self.set_project(project)
-
-    def set_project(self, rootpath, project_name=None):
-
-        # Check if rootpath is valid.  For LVS, there should be subdirectories
-        # "layout/" and "netlist/" or "verilog/".
-
-        haslay = os.path.isdir(rootpath + '/layout')
-        hasvlog = os.path.isdir(rootpath + '/verilog')
-        hasnet = os.path.isdir(rootpath + '/netlist')
-        if not haslay or not (hasvlog or hasnet):
-            if not haslay:
-                print("Project path has no layout (/layout) subdirectory.")
-            if not (hasvlog or hasnet):
-                print("Project path has no verilog (/verilog), or netlist (/netlist) subdirectory.")
-            # Continue anyway;  assume that netlists will be selected manually
-
-        if self.logfile:
-            self.logfile.close()
-            self.logfile = None
-
-        if not project_name:
-            project = os.path.split(rootpath)[1]
-        else:
-            project = project_name
-
-        if self.project != project:
-
-            self.rootpath = rootpath
-            self.project = project
-
-            # Clear out old project data
-            self.toppane.lvsreport.repopulate([], [])
-
-            # Close any open logfile.
-            if self.logfile:
-                self.logfile.close()
-                self.logfile = None
-
-            # Put new log file called 'lvs.log' in the mag/ subdirectory
-            self.logfile = open(rootpath + '/layout/lvs.log', 'w')
-            # Print some initial information to the logfile.
-            self.logprint('Starting new log file ' + datetime.datetime.now().strftime('%c'),
-				doflush=True)
-
-            # Update project button
-            self.toppane.title2_frame.project_select.config(text = self.project)
-            self.toppane.title2_frame.path_label.config(text = self.rootpath)
-            # Cell name is the same as project name initially
-            self.layout = self.project
-            self.schematic = self.project
-            self.toppane.title2_frame.layout_select.config(text = self.layout)
-            self.toppane.title2_frame.schem_select.config(text = self.schematic)
-
-            # Update schematic button
-            if os.path.isfile(rootpath + '/verilog/' + self.schematic + '.v'):
-                self.toppane.title2_frame.schem_label.config(text = 'Verilog netlist:')
-            else:
-                self.toppane.title2_frame.schem_label.config(text = 'Schematic netlist:')
-
-            # If there is a comparison file that post-dates both netlists, load it.
-            self.check_lvs()
-        return True
-
-    def check_layout_out_of_date(self, spipath, layoutpath):
-        # Check if a netlist (spipath) is out-of-date relative to the layouts
-        # (layoutpath).  Need to read the netlist and check all of the subcells.
-        need_capture = False
-        if not os.path.isfile(spipath):
-            return True
-        if os.path.isfile(layoutpath):
-            spi_statbuf = os.stat(spipath)
-            lay_statbuf = os.stat(layoutpath)
-            if spi_statbuf.st_mtime < lay_statbuf.st_mtime:
-                # netlist exists but is out-of-date
-                need_capture = True
-            else:
-                # only found that the top-level-layout is older than the
-                # netlist.  Now need to read the netlist, find all subcircuits,
-                # and check those dates, too.
-                layoutdir = os.path.split(layoutpath)[0]
-                subrex = re.compile('^[^\*]*[ \t]*.subckt[ \t]+([^ \t]+).*$', re.IGNORECASE)
-                with open(spipath, 'r') as ifile:
-                    duttext = ifile.read()
- 
-                dutlines = duttext.replace('\n+', ' ').splitlines()
-                for line in dutlines:
-                    lmatch = subrex.match(line)
-                    if lmatch:
-                        subname = lmatch.group(1)
-                        sublayout = layoutdir + '/' + subname + '.mag'
-                        # subcircuits that cannot be found in the current directory are
-                        # assumed to be library components and therefore never out-of-date.
-                        if os.path.exists(sublayout):
-                            sub_statbuf = os.stat(sublayout)
-                            if spi_statbuf.st_mtime < lay_statbuf.st_mtime:
-                                # netlist exists but is out-of-date
-                                need_capture = True
-                                break
-        return need_capture
-
-    def check_schematic_out_of_date(self, spipath, schempath):
-        # Check if a netlist (spipath) is out-of-date relative to the schematics
-        # (schempath).  Need to read the netlist and check all of the subcells.
-        need_capture = False
-        if not os.path.isfile(spipath):
-            return True
-        if os.path.isfile(schempath):
-            spi_statbuf = os.stat(spipath)
-            sch_statbuf = os.stat(schempath)
-            if spi_statbuf.st_mtime < sch_statbuf.st_mtime:
-                # netlist exists but is out-of-date
-                need_capture = True
-            else:
-                # only found that the top-level-schematic is older than the
-                # netlist.  Now need to read the netlist, find all subcircuits,
-                # and check those dates, too.
-                schemdir = os.path.split(schempath)[0]
-                subrex = re.compile('^[^\*]*[ \t]*.subckt[ \t]+([^ \t]+).*$', re.IGNORECASE)
-                with open(spipath, 'r') as ifile:
-                    duttext = ifile.read()
- 
-                dutlines = duttext.replace('\n+', ' ').splitlines()
-                for line in dutlines:
-                    lmatch = subrex.match(line)
-                    if lmatch:
-                        subname = lmatch.group(1)
-                        # NOTE: Electric uses library:cell internally to track libraries,
-                        # and maps the ":" to "__" in the netlist.  Not entirely certain that
-                        # the double-underscore uniquely identifies the library:cell. . .
-                        librex = re.compile('(.*)__(.*)', re.IGNORECASE)
-                        lmatch = librex.match(subname)
-                        if lmatch:
-                            elecpath = os.path.split(os.path.split(schempath)[0])[0]
-                            libname = lmatch.group(1)
-                            subschem = elecpath + '/' + libname + '.delib/' + lmatch.group(2) + '.sch'
-                        else:
-                            libname = {}
-                            subschem = schemdir + '/' + subname + '.sch'
-                        # subcircuits that cannot be found in the current directory are
-                        # assumed to be library components and therefore never out-of-date.
-                        if os.path.exists(subschem):
-                            sub_statbuf = os.stat(subschem)
-                            if spi_statbuf.st_mtime < sub_statbuf.st_mtime:
-                                # netlist exists but is out-of-date
-                                need_capture = True
-                                break
-                        # mapping of characters to what's allowed in SPICE makes finding
-                        # the associated schematic file a bit difficult.  Requires wild-card
-                        # searching.
-                        elif libname:
-                            restr = lmatch.group(2) + '.sch'
-                            restr = restr.replace('.', '\.')
-                            restr = restr.replace('_', '.')
-                            schrex = re.compile(restr, re.IGNORECASE)
-                            libpath = elecpath + '/' + libname + '.delib'
-                            if os.path.exists(libpath):
-                                liblist = os.listdir(libpath)
-                                for file in liblist:
-                                    lmatch = schrex.match(file)
-                                    if lmatch:
-                                        subschem = libpath + '/' + file
-                                        sub_statbuf = os.stat(subschem)
-                                        if spi_statbuf.st_mtime < sch_statbuf.st_mtime:
-                                            # netlist exists but is out-of-date
-                                            need_capture = True
-                                        break
-        return need_capture
-
-    def check_lvs(self):
-        # If both netlists exist, and comp.json is more recent than both, then
-        # load LVS results from comp.json
-        project_path = self.rootpath
-        project_name = self.project
-        layout_path = project_path + '/layout/' + project_name + '.spc'
-        net_path = project_path + '/netlist/' + project_name + '.spi'
-        comp_path = project_path + '/layout/comp.json'
-
-        if os.path.exists(layout_path) and os.path.exists(net_path) and os.path.exists(comp_path):
-            magtime = os.stat(layout_path).st_mtime
-            schemtime = os.stat(net_path).st_mtime
-            comptime = os.stat(comp_path).st_mtime
-            if comptime > magtime and comptime > schemtime:
-                print("Loading LVS results from file.")
-                self.generate(comp_path)
-
-    def generate_layout_netlist(self, layout_path, layout_src, project_path):
-        # Does layout netlist exist and is it current?
-        if self.check_layout_out_of_date(layout_path, layout_src):
-            print('Generating layout netlist.')
-            self.update_idletasks()
-            mproc = subprocess.Popen(['magic', '-dnull', '-noconsole',
-			self.layout], stdin = subprocess.PIPE, stdout = subprocess.PIPE,
-			stderr = subprocess.PIPE, cwd = project_path + '/layout',
-			universal_newlines = True)
-            mproc.stdin.write("select top cell\n")
-            mproc.stdin.write("expand\n")
-            mproc.stdin.write("extract all\n")
-            mproc.stdin.write("ext2spice hierarchy on\n")
-            mproc.stdin.write("ext2spice format ngspice\n")
-            mproc.stdin.write("ext2spice scale off\n")
-            mproc.stdin.write("ext2spice renumber off\n")
-            mproc.stdin.write("ext2spice subcircuit top auto\n")
-            mproc.stdin.write("ext2spice cthresh infinite\n")
-            mproc.stdin.write("ext2spice rthresh infinite\n")
-            mproc.stdin.write("ext2spice blackbox on\n")
-            mproc.stdin.write("ext2spice -o " + self.layout + ".spi\n")
-            mproc.stdin.write("quit -noprompt\n")
-            magicout = mproc.communicate()[0]
-            self.printwarn(magicout)
-            if mproc.returncode != 0:
-                print('Failure to generate new layout netlist.')
-                return False
-
-            # Move .spi netlist to project_dir/netlist/lvs/
-            shutil.move(project_path + '/layout/' + self.layout + '.spi', layout_path)
-            # Remove extraction files
-            for file in os.listdir(project_path + '/layout'):
-                if os.path.splitext(file)[1] == '.ext':
-                    os.remove(project_path + '/layout/' + file)
-        else:
-            print('Layout netlist is up-to-date, not regenerating.')
-        return True
-
-    def run_lvs(self, value):
-        # "value" is ignored (?)
-
-        # Check if netlists exist and are current;  otherwise create them.
-        # Then run LVS.
-
-        project_path = self.rootpath
-        project_name = self.project
-        comp_path = project_path + '/layout/comp.json'
-        has_vlog = False
-        vlog_path = project_path + '/verilog/' + project_name + '.v'
-
-        layout_path = project_path + '/netlist/lvs/' + self.layout + '.spi'
-        net_path = project_path + '/netlist/schem/' + self.schematic + '.spi'
-        layout_src = project_path + '/layout/' + self.layout + '.mag'
-
-        # Does the setup file exist (this is optional)?
-        if self.lvs_setup != '' and not os.path.isfile('setup.tcl'):
-            print('No technology setup file selected.')
-
-        # Does schematic netlist exist?
-        if not os.path.isfile(vlog_path) and not os.path.isfile(net_path):
-            print('Error:  No schematic netlist or verilog netlist.')
-            return
-
-        # Does LVS netlist subdirectory exist?
-        if not os.path.exists(project_path + '/netlist/lvs'):
-            os.makedirs(project_path + '/netlist/lvs')
-
-        # Does layout netlist exist and is it current?
-        if not self.generate_layout_netlist(layout_path, layout_src, project_path):
-            return False
-
-        # Final check
-        if not os.path.isfile(layout_path):
-            print('Error:  No netlist generated from magic.')
-            return
-
-        else:
-            # Read in netlist and convert commas from [X,Y] arrays to vertical bars
-            # as something that can be converted back as necessary.  ngspice treats
-            # commas as special characters for some reason.
-            with open(layout_path) as ifile:
-                spitext = ifile.read()
-
-            # spilines = spitext.replace(',', '|')
-            # with open(layout_path, 'w') as ofile:
-            #     ofile.write(spilines)
-
-        # Check the netlist to see if the cell to match is a subcircuit.  If
-        # not, then assume it is the top level.
-
-        is_subckt = False
-        subrex = re.compile('^[^\*]*[ \t]*.subckt[ \t]+([^ \t]+).*$', re.IGNORECASE)
-        dutlines = spitext.replace('\n+', ' ').splitlines()
-        for line in dutlines:
-            lmatch = subrex.match(line)
-            if lmatch:
-                subname = lmatch.group(1)
-                if subname == self.layout:
-                    is_subckt = True
-                    break
-
-        if is_subckt:
-            layout_arg = layout_path + ' ' + self.layout
-            layout_text = '"' + layout_arg + '"'
-        else:
-            layout_arg = layout_path
-            layout_text = layout_arg
-
-        if has_vlog:
-            schem_arg = vlog_path + ' ' + self.schematic
-        else:
-            schem_arg = net_path + ' ' + self.schematic
-        schem_text = '"' + schem_arg + '"'
-
-        # Remove any previous comparison output file
-        comp_out_path = os.path.splitext(comp_path)[0] + '.out'
-        if os.path.exists(comp_out_path):
-            os.remove(comp_out_path)
-
-        # Run netgen as subprocess
-        print('Running: netgen -batch lvs ' + layout_text + 
-		' ' + schem_text + ' ' + self.lvs_setup + ' ' + comp_out_path +
-		' -json -blackbox')
-        # Note: Because arguments to subprocess are list items, the {filename cell}
-        # pair does *not* have to be quoted or braced.  Doing so causes a parse
-        # error.
-        self.lvsproc = subprocess.Popen(['netgen', '-batch', 'lvs',
-		layout_arg, schem_arg,
-		self.lvs_setup, comp_out_path, '-json', '-blackbox'],
-		cwd=project_path + '/layout',
-		stdout=subprocess.PIPE, stderr=subprocess.PIPE, bufsize=0)
-        # This is largely unnecessary as netgen usually runs to completion very quickly.
-        self.watchclock(comp_path)
-
-    def watchclock(self, filename):
-        if self.lvsproc == None:
-            return
-
-        lvs_status = self.lvsproc.poll()
-        sresult = select.select([self.lvsproc.stdout, self.lvsproc.stderr], [], [], 0)[0]
-        if self.lvsproc.stdout in sresult:
-            outstring = self.lvsproc.stdout.readline().decode().strip()
-            self.logprint(outstring, doflush=True)
-            print(outstring)
-        elif self.lvsproc.stderr in sresult:
-            errstring = self.lvsproc.stderr.readline().decode().strip()
-            self.logprint(errstring, doflush = True)
-            print(errstring, file=sys.stderr)
-
-        if lvs_status != None:
-            print("netgen LVS exited with status " + str(lvs_status))
-            self.lvsproc = None
-            if lvs_status != 0:
-                print('Errors encountered in LVS.')
-                self.logprint('Errors in LVS, lvs status = ' + str(lvs_status), doflush=True)
-            # Done;  now read comp.json and fill the treeview listbox.
-            self.generate(filename)
-        else:
-            self.after(500, lambda: self.watchclock(filename))
-
-    # Generate display from "comp.out" file (json file now preferred)
-
-    def generate_orig(self, lvspath):
-        lefttext = []
-        righttext = []
-        print("Reading LVS output file " + lvspath)
-        if os.path.exists(lvspath):
-            with open(lvspath, 'r') as ifile:
-                lvslines = ifile.read().splitlines()
-            for line in lvslines:
-                if '|' in line:
-                    # parts = line.split('|')
-                    # lefttext.append(parts[0])
-                    # righttext.append(parts[1])
-                    lefttext.append(line[0:42].strip())
-                    righttext.append(line[44:].strip())
-                else:
-                    lefttext.append(line)
-                    righttext.append('')
-            # Populate treeview with text
-            self.toppane.lvsreport.repopulate(lefttext, righttext)
- 
-        else:
-            print("Error:  No output file generated from LVS.")
-
-    # Generate output from LVS report JSON file comp.json
-
-    def generate(self, lvspath):
-        lefttext = []
-        righttext = []
-        print("Reading LVS output file " + lvspath)
-        if os.path.exists(lvspath):
-            with open(lvspath, 'r') as ifile:
-                self.lvsdata = json.load(ifile)
-
-            # Populate treeview with text
-            self.toppane.lvsreport.json_repopulate(self.lvsdata)
- 
-        else:
-            print("Error:  No output file generated from LVS.")
-
-    def findrecord(self, value):
-        print("Unimplemented function")
-
-    def findrecord_test(self, value):
-        # Check if socket is defined;  if not, attempt to open one
-        if not self.msock:
-            try:
-                self.msock = socket.socket(socket.AF_INET, socket.SOCK_STREAM)
-            except:
-                 print("No response from layout tool.")
-
-            if self.msock:
-                self.msock.connect(("0.0.0.0", 12946))
-                self.msock.setblocking(False)
-        if self.msock:
-            # Pull name of net or device from 'value'
-            # This is a test:
-            self.msock.sendall(b'box 0 0 100 100\r\n')
-
-if __name__ == '__main__':
-    options = []
-    arguments = []
-    for item in sys.argv[1:]:
-        if item.find('-', 0) == 0:
-            options.append(item)
-        else:
-            arguments.append(item)
-
-    root = tkinter.Tk()
-    app = LVSManager(root)
-    if arguments:
-        if len(arguments) >= 2:
-            app.set_project(arguments[0], project_name=arguments[1])
-        else:
-            app.set_project(arguments[0])
-
-    root.mainloop()
@@ -343,7 +343,7 @@ class LVSManager(ttk.Frame):
            techbase = os.path.split(techname)[1]
            self.tech = os.path.splitext(techbase)[0]
            self.lvs_setup = techname
-            self.toppane.title2_frame.layout_select.config(text = self.tech)
+            self.toppane.title2_frame.tech_select.config(text = self.tech)

    def choose_layout(self):
        try:
@@ -358,30 +358,37 @@ class LVSManager(ttk.Frame):
 			title = "Choose a layout cell to compare.")
        if cellname != '':
            print("Selected compare cell " + cellname)
+            self.layout = cellname
            cellbase = os.path.split(cellname)[1]
-            self.layout = os.path.splitext(cellbase)[0]
-            self.toppane.title2_frame.layout_select.config(text = self.layout)
+            layoutname = os.path.splitext(cellbase)[0]
+            self.toppane.title2_frame.layout_select.config(text = layoutname)
+            fileext = os.path.splitext(cellbase)[1]
+            if fileext == '.mag':
+                self.toppane.title2_frame.layout_label.config(text = 'Layout:')
+            else:
+                self.toppane.title2_frame.layout_label.config(text = 'Layout netlist:')

    def choose_netlist(self):
        try:
            project_path = self.rootpath
-            initdirname = self.rootpath + '/netlist/' + self.project + '.spi'
+            initdirname = self.rootpath + '/netlist/' + self.project + '.spice'
        except:
            print('Must choose a project first.')
            return
        cellname = filedialog.askopenfilename(multiple=False,
 			initialdir = initdirname,
-			filetypes = (("Spice netlist", "*.spi"),("Verilog netlist", "*.v")),
+			filetypes = (("Spice netlist", "*.spice"),("Verilog netlist", "*.v"),("All Files","*.*")),
 			title = "Choose a netlist to compare.")
        if cellname != '':
            print("Selected compare cell " + cellname)
+            self.schematic = cellname
            cellbase = os.path.split(cellname)[1]
-            self.schematic = os.path.splitext(cellbase)[0]
-            self.toppane.title2_frame.schem_select.config(text = self.schematic)
+            schematic_name = os.path.splitext(cellbase)[0]
+            self.toppane.title2_frame.schem_select.config(text = schematic_name)
            fileext = os.path.splitext(cellbase)[1]
            if fileext == '.v':
                self.toppane.title2_frame.schem_label.config(text = 'Verilog netlist:')
-            elif fileext == '.sp' or fileext == '.spi' or fileext == '.spice' or fileext == '.spc' or fileext == '.ckt':
+            elif fileext == '.sp' or fileext == '.spice' or fileext == '.spi' or fileext == '.spc' or fileext == '.ckt':
                self.toppane.title2_frame.schem_label.config(text = 'SPICE netlist:')
            elif fileext == '.cdl':
                self.toppane.title2_frame.schem_label.config(text = 'CDL netlist:')
@@ -433,7 +440,10 @@ class LVSManager(ttk.Frame):
                self.logfile = None

            # Put new log file called 'lvs.log' in the mag/ subdirectory
-            self.logfile = open(rootpath + '/layout/lvs.log', 'w')
+            if os.path.exists(rootpath + '/layout'):
+                self.logfile = open(rootpath + '/layout/lvs.log', 'w')
+            else:
+                self.logfile = open(rootpath + '/lvs.log', 'w')
            # Print some initial information to the logfile.
            self.logprint('Starting new log file ' + datetime.datetime.now().strftime('%c'),
 				doflush=True)
@@ -444,15 +454,23 @@ class LVSManager(ttk.Frame):
            # Cell name is the same as project name initially
            self.layout = self.project
            self.schematic = self.project
-            self.toppane.title2_frame.layout_select.config(text = self.layout)
-            self.toppane.title2_frame.schem_select.config(text = self.schematic)
+            layname = os.path.splitext(os.path.split(self.layout)[1])[0]
+            self.toppane.title2_frame.layout_select.config(text = layname)
+            schemname = os.path.splitext(os.path.split(self.schematic)[1])[0]
+            self.toppane.title2_frame.schem_select.config(text = schemname)

            # Update schematic button
-            if os.path.isfile(rootpath + '/verilog/' + self.schematic + '.v'):
+            if os.path.splitext(self.schematic)[1] == '.v':
                self.toppane.title2_frame.schem_label.config(text = 'Verilog netlist:')
            else:
                self.toppane.title2_frame.schem_label.config(text = 'Schematic netlist:')

+            # Update layout button
+            if os.path.splitext(self.layout)[1] == '.mag':
+                self.toppane.title2_frame.schem_label.config(text = 'Layout:')
+            else:
+                self.toppane.title2_frame.schem_label.config(text = 'Layout netlist:')
+
            # If there is a comparison file that post-dates both netlists, load it.
            self.check_lvs()
        return True
@@ -567,8 +585,8 @@ class LVSManager(ttk.Frame):
        # load LVS results from comp.json
        project_path = self.rootpath
        project_name = self.project
-        layout_path = project_path + '/layout/' + project_name + '.spc'
-        net_path = project_path + '/netlist/' + project_name + '.spi'
+        layout_path = project_path + '/layout/' + project_name + '.spice'
+        net_path = project_path + '/netlist/' + project_name + '.spice'
        comp_path = project_path + '/layout/comp.json'

        if os.path.exists(layout_path) and os.path.exists(net_path) and os.path.exists(comp_path):
@@ -599,7 +617,7 @@ class LVSManager(ttk.Frame):
            mproc.stdin.write("ext2spice cthresh infinite\n")
            mproc.stdin.write("ext2spice rthresh infinite\n")
            mproc.stdin.write("ext2spice blackbox on\n")
-            mproc.stdin.write("ext2spice -o " + self.layout + ".spi\n")
+            mproc.stdin.write("ext2spice -o " + self.layout + ".spice\n")
            mproc.stdin.write("quit -noprompt\n")
            magicout = mproc.communicate()[0]
            self.printwarn(magicout)
@@ -607,8 +625,8 @@ class LVSManager(ttk.Frame):
                print('Failure to generate new layout netlist.')
                return False

-            # Move .spi netlist to project_dir/netlist/lvs/
-            shutil.move(project_path + '/layout/' + self.layout + '.spi', layout_path)
+            # Move .spice netlist to project_dir/netlist/lvs/
+            shutil.move(project_path + '/layout/' + self.layout + '.spice', layout_path)
            # Remove extraction files
            for file in os.listdir(project_path + '/layout'):
                if os.path.splitext(file)[1] == '.ext':
@@ -625,17 +643,37 @@ class LVSManager(ttk.Frame):

        project_path = self.rootpath
        project_name = self.project
-        comp_path = project_path + '/layout/comp.json'
+
+        # Diagnostic:
+        print('project_name is ' + project_name)
+        print('project_path is ' + project_path)
+        print('self.layout is ' + self.layout)
+        print('self.schematic is ' + self.schematic)
+        print('self.lvs_setup is ' + self.lvs_setup)
+
        has_vlog = False
        vlog_path = project_path + '/verilog/' + project_name + '.v'

-        layout_path = project_path + '/netlist/lvs/' + self.layout + '.spi'
-        net_path = project_path + '/netlist/schem/' + self.schematic + '.spi'
-        layout_src = project_path + '/layout/' + self.layout + '.mag'
+        if os.path.isfile(self.layout):
+            layout_path = self.layout
+            layout_src = None
+        else:
+            layout_path = project_path + '/netlist/lvs/' + self.layout + '.spice'
+            layout_src = project_path + '/layout/' + self.layout + '.mag'
+
+        comp_dir = os.path.split(layout_path)[0]
+        comp_path = comp_dir + '/comp.json'
+
+        if os.path.isfile(self.schematic):
+            net_path = self.schematic
+        else:
+            net_path = project_path + '/netlist/schem/' + self.schematic + '.spice'

        # Does the setup file exist (this is optional)?
-        if self.lvs_setup != '' and not os.path.isfile('setup.tcl'):
+        if self.lvs_setup == '' and not os.path.isfile('setup.tcl'):
            print('No technology setup file selected.')
+        elif not os.path.isfile(self.lvs_setup):
+            print("Can't find technology setup file " + self.lvs_setup)

        # Does schematic netlist exist?
        if not os.path.isfile(vlog_path) and not os.path.isfile(net_path):
@@ -643,14 +681,16 @@ class LVSManager(ttk.Frame):
            return

        # Does LVS netlist subdirectory exist?
-        if not os.path.exists(project_path + '/netlist/lvs'):
-            os.makedirs(project_path + '/netlist/lvs')
+        if os.path.exists(project_path + '/netlist'):
+            if not os.path.exists(project_path + '/netlist/lvs'):
+                os.makedirs(project_path + '/netlist/lvs')

        # Does layout netlist exist and is it current?
-        if not self.generate_layout_netlist(layout_path, layout_src, project_path):
-            return False
+        if layout_src:
+            if not self.generate_layout_netlist(layout_path, layout_src, project_path):
+                return False

-        # Final check
+        # Final checks
        if not os.path.isfile(layout_path):
            print('Error:  No netlist generated from magic.')
            return
@@ -662,26 +702,27 @@ class LVSManager(ttk.Frame):
            with open(layout_path) as ifile:
                spitext = ifile.read()

-            # spilines = spitext.replace(',', '|')
-            # with open(layout_path, 'w') as ofile:
-            #     ofile.write(spilines)
-
        # Check the netlist to see if the cell to match is a subcircuit.  If
        # not, then assume it is the top level.

+        layoutcell = os.path.splitext(os.path.split(self.layout)[1])[0]
        is_subckt = False
+        subname = None
        subrex = re.compile('^[^\*]*[ \t]*.subckt[ \t]+([^ \t]+).*$', re.IGNORECASE)
        dutlines = spitext.replace('\n+', ' ').splitlines()
        for line in dutlines:
            lmatch = subrex.match(line)
            if lmatch:
                subname = lmatch.group(1)
-                if subname == self.layout:
+                if subname == layoutcell:
                    is_subckt = True
                    break

        if is_subckt:
-            layout_arg = layout_path + ' ' + self.layout
+            layout_arg = self.layout + ' ' + layoutcell
+            layout_text = '"' + layout_arg + '"'
+        elif subname:
+            layout_arg = self.layout + ' ' + subname
            layout_text = '"' + layout_arg + '"'
        else:
            layout_arg = layout_path
@@ -690,8 +731,39 @@ class LVSManager(ttk.Frame):
        if has_vlog:
            schem_arg = vlog_path + ' ' + self.schematic
        else:
-            schem_arg = net_path + ' ' + self.schematic
-        schem_text = '"' + schem_arg + '"'
+            # Final checks
+            if not os.path.isfile(net_path):
+                print('Error:  No netlist from schematic.')
+                return
+
+            with open(net_path) as ifile:
+                spitext = ifile.read()
+
+            # Check the netlist to see if the cell to match is a subcircuit.  If
+            # not, then assume it is the top level.
+
+            schemcell = os.path.splitext(os.path.split(self.schematic)[1])[0]
+            subname = None
+            is_subckt = False
+            subrex = re.compile('^[^\*]*[ \t]*.subckt[ \t]+([^ \t]+).*$', re.IGNORECASE)
+            dutlines = spitext.replace('\n+', ' ').splitlines()
+            for line in dutlines:
+                lmatch = subrex.match(line)
+                if lmatch:
+                    subname = lmatch.group(1)
+                    if subname == schemcell:
+                        is_subckt = True
+                        break
+
+            if is_subckt:
+                schem_arg = self.schematic + ' ' + schemcell
+                schem_text = '"' + schem_arg + '"'
+            elif subname:
+                schem_arg = self.schematic + ' ' + subname
+                schem_text = '"' + schem_arg + '"'
+            else:
+                schem_arg = net_path
+                schem_text = schem_arg

        # Remove any previous comparison output file
        comp_out_path = os.path.splitext(comp_path)[0] + '.out'
@@ -708,7 +780,7 @@ class LVSManager(ttk.Frame):
        self.lvsproc = subprocess.Popen(['netgen', '-batch', 'lvs',
 		layout_arg, schem_arg,
 		self.lvs_setup, comp_out_path, '-json', '-blackbox'],
-		cwd=project_path + '/layout',
+		cwd=comp_dir,
 		stdout=subprocess.PIPE, stderr=subprocess.PIPE, bufsize=0)
        # This is largely unnecessary as netgen usually runs to completion very quickly.
        self.watchclock(comp_path)
@@ -352,7 +352,7 @@ proc netgen::convert_to_json {filename lvs_final} {
   close $fjson
 }

-#----------------------------------------------------------------
+#-----------------------------------------------------------------------
 # Define the "lvs" command as a way of calling the netgen options
 # for standard compare, essentially the same as the old "netcomp"
 # standalone program.
@@ -361,14 +361,20 @@ proc netgen::convert_to_json {filename lvs_final} {
 # although if the cells have not been read in yet, then the
 # original syntax of filename or {filename cellname} is required.
 #
-# "args" is passed to verify and may therefore contain only the
-# value "-list" or nothing.  If "-list", then output is returned
-# as a nested list.
-#----------------------------------------------------------------
+# "args" may be "-list", "-json", or "-blackbox".
+#    "-list" returns output as a nested list.
+#    "-json" creates a .json-format output file in addition to stdout.
+#    "-blackbox" treats empty cells as black-box entries.
+#    "-noflatten={list}" is a list of cells not to flatten if mismatched.
+#    i.e., the cells are expected to match and any mismatch cannot be
+#    expected to be resolved by flattening the contents of the mismatched
+#    cells.
+#-----------------------------------------------------------------------

 proc netgen::lvs { name1 name2 {setupfile setup.tcl} {logfile comp.out} args} {
   set dolist 0
   set dojson 0
+   set noflat {}
   foreach arg $args {
      if {$arg == "-list"} {
 	 puts stdout "Generating list result"
@@ -382,9 +388,30 @@ proc netgen::lvs { name1 name2 {setupfile setup.tcl} {logfile comp.out} args} {
      } elseif {$arg == "-blackbox"} {
 	 puts stdout "Treating empty subcircuits as black-box cells"
 	 netgen::model blackbox on
-      } elseif {$arg == "-full"} {
-	 puts stdout "Using full symmetry breaking method"
-	 netgen::symmetry full
+      } elseif {[string first "-noflatten=" $arg] == 0} {
+	 set value [string range $arg 11 end]
+	 # If argument is a filename then read the list of cells from it;
+	 # otherwise, argument is the list of files itself in quotes or
+	 # braces.
+	 if {![catch {file exists $value}]} {
+	    if {![catch {open $value r} fnf]} {
+	       while {[gets $fnf line] >= 0} {
+		  if {[lindex $line 0] != "#"} {
+		     foreach cell $line {
+		    	lappend noflat $cell
+		     }
+		  }
+	       }
+	       close $fnf
+	    } else {
+	       puts stderr "Cannot open file $value for reading cell list."
+	    }
+	 } else {
+	    set noflat [string trim $value \"\{\}]
+	 }
+	 if {[llength $noflat] > 0} {
+	    puts stdout "Will not flatten these subcells: $noflat"
+	 }
      }
   }

@@ -504,7 +531,8 @@ proc netgen::lvs { name1 name2 {setupfile setup.tcl} {logfile comp.out} args} {
      return
   }
   set properr {}
-   set pinsgood 0
+   set matcherr {}
+   set pinsgood -1
   while {$endval != {}} {
      if {$dolist == 1} {
         netgen::run -list converge
@@ -532,12 +560,33 @@ proc netgen::lvs { name1 name2 {setupfile setup.tcl} {logfile comp.out} args} {

 	    # Flatten the non-matching subcircuit (but not the top-level cells)
            if {[netgen::print queue] != {}} {
-	       netgen::log put "  Flattening non-matched subcircuits $endval"
-	       netgen::flatten class "[lindex $endval 0] $fnum1"
-	       netgen::flatten class "[lindex $endval 1] $fnum2"
+	       if {([lsearch $noflat [lindex $endval 0]] == -1) &&
+			([lsearch $noflat [lindex $endval 1]] == -1)} {
+	           netgen::log put "  Flattening non-matched subcircuits $endval\n"
+	           netgen::flatten class "[lindex $endval 0] $fnum1"
+	           netgen::flatten class "[lindex $endval 1] $fnum2"
+	       } else {
+	           netgen::log put "  Continuing with black-boxed subcircuits $endval\n"
+		   lappend matcherr [lindex $endval 0]"($fnum1)"
+		   lappend matcherr [lindex $endval 1]"($fnum2)"
+	           # Match pins
+                   netgen::log echo off
+	           if {$dolist == 1} {
+		       set result [equate -list -force pins "$fnum1 [lindex $endval 0]" \
+				"$fnum2 [lindex $endval 1]"]
+	           } else {
+		       set result [equate -force pins "$fnum1 [lindex $endval 0]" \
+				"$fnum2 [lindex $endval 1]"]
+	           }
+	           if {$result != 0} {
+		       equate classes "$fnum1 [lindex $endval 0]" \
+			        "$fnum2 [lindex $endval 1]"
+	           }
+	           set pinsgood $result
+                   netgen::log echo on
+	       }
 	    }
 	 } else {
-	    # Match pins
            netgen::log echo off
 	    if {$dolist == 1} {
 		set result [equate -list pins "$fnum1 [lindex $endval 0]" \
@@ -550,16 +599,42 @@ proc netgen::lvs { name1 name2 {setupfile setup.tcl} {logfile comp.out} args} {
 		equate classes "$fnum1 [lindex $endval 0]" \
 			 "$fnum2 [lindex $endval 1]"
 	    }
-	    set pinsgood $result
+	    # If $uresult == -1 then these are black-box entries and
+	    # $pinsgood should not be set to the resulting value.
+	    if {$uresult > 0} {
+	        set pinsgood $result
+	    }
            netgen::log echo on
 	 }
 	 if {$uresult == 2} {lappend properr [lindex $endval 0]}
      } else {
 	 # Flatten the non-matching subcircuit (but not the top-level cells)
         if {[netgen::print queue] != {}} {
-	    netgen::log put "  Flattening non-matched subcircuits $endval"
-	    netgen::flatten class "[lindex $endval 0] $fnum1"
-	    netgen::flatten class "[lindex $endval 1] $fnum2"
+	    if {([lsearch $noflat [lindex $endval 0]] == -1) &&
+		    ([lsearch $noflat [lindex $endval 1]] == -1)} {
+	       netgen::log put "  Flattening non-matched subcircuits $endval\n"
+	       netgen::flatten class "[lindex $endval 0] $fnum1"
+	       netgen::flatten class "[lindex $endval 1] $fnum2"
+	    } else {
+	       netgen::log put "  Continuing with black-boxed subcircuits $endval\n"
+	       lappend matcherr [lindex $endval 0]"($fnum1)"
+	       lappend matcherr [lindex $endval 0]"($fnum2)"
+	       # Match pins
+               netgen::log echo off
+	       if {$dolist == 1} {
+		   set result [equate -list -force pins "$fnum1 [lindex $endval 0]" \
+			    "$fnum2 [lindex $endval 1]"]
+	       } else {
+		   set result [equate -force pins "$fnum1 [lindex $endval 0]" \
+			    "$fnum2 [lindex $endval 1]"]
+	       }
+	       if {$result != 0} {
+		   equate classes "$fnum1 [lindex $endval 0]" \
+			    "$fnum2 [lindex $endval 1]"
+	       }
+	       set pinsgood $result
+               netgen::log echo on
+	    }
 	 }
      }
      netgen::log echo off
@@ -575,12 +650,16 @@ proc netgen::lvs { name1 name2 {setupfile setup.tcl} {logfile comp.out} args} {
   puts stdout "Result: " nonewline
   netgen::log echo on
   if {$pinsgood == 0} {
-      netgen::log put "The top level cell failed pin matching.\n"
+      # NOTE:  Need to disambiguate these two cases. . .
+      netgen::log put "Cells failed matching, or top level cell failed pin matching.\n"
   } else {
      verify only
   }
   if {$properr != {}} {
-      netgen::log put "The following cells had property errors: $properr\n"
+      netgen::log put "The following cells had property errors:\n " [regsub -all { } $properr "\n "] "\n"
+   }
+   if {$matcherr != {}} {
+      netgen::log put "The following subcells failed to match:\n " [regsub -all { } $matcherr "\n "] "\n"
   }
   if {$dolog} {
      netgen::log end
@@ -32,6 +32,9 @@ the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
 #include "print.h"
 #include "query.h"	/* for ElementNodes() */
 #include "hash.h"
+#include "xilinx.h"
+#include "tech.h"
+#include "flatten.h"

 #ifndef TRUE
 #define TRUE 1
@@ -246,8 +249,7 @@ Command netcmp_cmds[] = {
 		"\n   "
 		"toggle exhaustive subdivision"},
 	{"symmetry",		_netcmp_symmetry,
-		"[fast|full]\n   "
-		"apply method for symmetry breaking"},
+		"(deprecated)"},
 	{"restart",		_netcmp_restart,
 		"\n   "
 		"start over (reset data structures)"},
@@ -977,7 +979,7 @@ _netgen_writenet(ClientData clientData,
         SpiceCell(repstr, filenum, "");
         break;
      case VERILOG_IDX:
-         VerilogModule(repstr, filenum, "");
+         VerilogTop(repstr, filenum, "");
         break;
      case WOMBAT_IDX:
         Wombat(repstr,NULL);
@@ -2067,6 +2069,7 @@ _netcmp_format(ClientData clientData,
 	Tcl_WrongNumArgs(interp, 1, objv, "[col1_width [col2_width]]");
 	return TCL_ERROR;
    }
+    return TCL_OK;
 }

 /*------------------------------------------------------*/
@@ -2092,8 +2095,9 @@ _netcmp_compare(ClientData clientData,
   int dohierarchy = FALSE;
   int assignonly = FALSE;
   int argstart = 1, qresult, llen, result;
+   int hascontents1, hascontents2;
   struct Correspond *nextcomp;
-   struct nlist *tp;
+   struct nlist *tp1 = NULL, *tp2 = NULL;
   Tcl_Obj *flist = NULL;

   if (objc > 1) {
@@ -2136,24 +2140,24 @@ _netcmp_compare(ClientData clientData,
      }
      else if ((objc - argstart) == 2) {

-	 result = CommonParseCell(interp, objv[argstart], &tp, &fnum1);
+	 result = CommonParseCell(interp, objv[argstart], &tp1, &fnum1);
         if (result != TCL_OK) return TCL_ERROR;
 	 else if (fnum1 == -1) {
 	    Tcl_SetResult(interp, "Cannot use wildcard with compare command.\n",
 			NULL);
 	    return TCL_ERROR;
 	 }
-         name1 = tp->name;
+         name1 = tp1->name;
 	 argstart++;

-	 result = CommonParseCell(interp, objv[argstart], &tp, &fnum2);
+	 result = CommonParseCell(interp, objv[argstart], &tp2, &fnum2);
         if (result != TCL_OK) return TCL_ERROR;
 	 else if (fnum2 == -1) {
 	    Tcl_SetResult(interp, "Cannot use wildcard with compare command.\n",
 			NULL);
 	    return TCL_ERROR;
 	 }
-         name2 = tp->name;
+         name2 = tp2->name;

         if (dohierarchy) {
 	    RemoveCompareQueue();
@@ -2192,11 +2196,34 @@ _netcmp_compare(ClientData clientData,
      ConvertGlobals(name2, fnum2);
   }

-   CreateTwoLists(name1, fnum1, name2, fnum2, dolist);
-   while (PrematchLists(name1, fnum1, name2, fnum2) > 0) {
-      Fprintf(stdout, "Making another compare attempt.\n");
-      CreateTwoLists(name1, fnum1, name2, fnum2, dolist);
+   tp1 = LookupCellFile(name1, fnum1);
+   tp2 = LookupCellFile(name2, fnum2);
+
+   hascontents1 = HasContents(tp1);
+   hascontents2 = HasContents(tp2);
+
+   if (hascontents1 && !hascontents2 && (tp2->flags & CELL_PLACEHOLDER)) {
+       Fprintf(stdout, "Circuit 2 cell %s is a black box; will not flatten "
+                        "Circuit 1\n", name2);
   }
+   else if (hascontents2 && !hascontents1 && (tp1->flags & CELL_PLACEHOLDER)) {
+       Fprintf(stdout, "Circuit 1 cell %s is a black box; will not flatten "
+                        "Circuit 2\n", name1);
+   }
+   else if (hascontents1 || hascontents2) {
+       FlattenUnmatched(tp1, name1, 1, 0);
+       FlattenUnmatched(tp2, name2, 1, 0);
+       DescribeContents(name1, fnum1, name2, fnum2);
+
+       while (PrematchLists(name1, fnum1, name2, fnum2) > 0) {
+          Fprintf(stdout, "Making another compare attempt.\n");
+          Printf("Flattened mismatched instances and attempting compare again.\n");
+          FlattenUnmatched(tp1, name1, 1, 0);
+          FlattenUnmatched(tp2, name2, 1, 0);
+          DescribeContents(name1, fnum1, name2, fnum2);
+       }
+   }
+   CreateTwoLists(name1, fnum1, name2, fnum2, dolist);

   // Return the names of the two cells being compared, if doing "compare
   // hierarchical".  If "-list" was specified, then append the output
@@ -2429,6 +2456,8 @@ _netcmp_run(ClientData clientData,
 	 else {
 	    enable_interrupt();
 	    while (!Iterate() && !InterruptPending);
+	    ExhaustiveSubdivision = 1;
+	    while (!Iterate() && !InterruptPending);
 	    if (dolist) {
 	       result = _netcmp_verify(clientData, interp, 2, objv - 1);
 	    }
@@ -2447,6 +2476,8 @@ _netcmp_run(ClientData clientData,
 	 else {
 	    enable_interrupt();
 	    while (!Iterate() && !InterruptPending);
+	    ExhaustiveSubdivision = 1;
+	    while (!Iterate() && !InterruptPending);
 	    automorphisms = VerifyMatching();
 	    if (automorphisms == -1)
 	       Fprintf(stdout, "Netlists do not match.\n");
@@ -2458,8 +2489,7 @@ _netcmp_run(ClientData clientData,
 	       automorphisms = ResolveAutomorphsByProperty();
 	       if (automorphisms == 0)
 	          Fprintf(stdout, "Netlists match uniquely.\n");
-	       else {
-
+	       else if (automorphisms > 0) {
 	          // Next, attempt to resolve automorphisms uniquely by
 	          // using the pin names
 		  automorphisms = ResolveAutomorphsByPin();
@@ -2467,14 +2497,17 @@ _netcmp_run(ClientData clientData,

 	       if (automorphisms == 0)
 	          Fprintf(stdout, "Netlists match uniquely.\n");
-	       else
+	       else if (automorphisms > 0) {
 	          // Anything left is truly indistinguishable
 	          Fprintf(stdout, "Netlists match with %d symmetr%s.\n",
 				automorphisms, (automorphisms == 1) ? "y" : "ies");

-	       while ((automorphisms = ResolveAutomorphisms()) > 0);
-	       if (automorphisms == -1) Fprintf(stdout, "Netlists do not match.\n");
-		  else Fprintf(stdout, "Circuits match correctly.\n");
+		  while ((automorphisms = ResolveAutomorphisms()) > 0);
+	       }
+	       if (automorphisms == -1)
+		  Fprintf(stdout, "Netlists do not match.\n");
+	       else
+		  Fprintf(stdout, "Circuits match correctly.\n");
 	    }
 	    if (PropertyErrorDetected) {
 	       Fprintf(stdout, "There were property errors.\n");
@@ -2828,11 +2861,13 @@ _netcmp_equate(ClientData clientData,
   char *name1 = NULL, *name2 = NULL, *optstart;
   struct nlist *tp1, *tp2, *SaveC1, *SaveC2;
   struct objlist *ob1, *ob2;
+   struct ElementClass *saveEclass = NULL;
+   struct NodeClass *saveNclass = NULL;
   int file1, file2;
-   int i, l1, l2, ltest, lent, dolist = 0;
+   int i, l1, l2, ltest, lent, dolist = 0, doforce = 0;
   Tcl_Obj *tobj1, *tobj2, *tobj3;

-   if (objc > 1) {
+   while (objc > 1) {
      optstart = Tcl_GetString(objv[1]);
      if (*optstart == '-') optstart++;
      if (!strcmp(optstart, "list")) {
@@ -2840,6 +2875,13 @@ _netcmp_equate(ClientData clientData,
 	 objv++;
 	 objc--;
      }
+      else if (!strcmp(optstart, "force")) {
+	 doforce = 1;
+	 objv++;
+	 objc--;
+      }
+      else
+	 break;
   }

   if ((objc != 2) && (objc != 4) && (objc != 6)) {
@@ -2997,6 +3039,12 @@ _netcmp_equate(ClientData clientData,
 	 break;

      case PINS_IDX:
+	 if ((ElementClasses != NULL) && (doforce == TRUE)) {
+	    saveEclass = ElementClasses;
+	    saveNclass = NodeClasses;
+	    ElementClasses = NULL;
+	    NodeClasses = NULL;
+	 }
 	 if ((ElementClasses == NULL) && (auto_blackbox == FALSE)) {
 	    if (CurrentCell == NULL) {
 		Fprintf(stderr, "Equate elements:  no current cell.\n");
@@ -3007,11 +3055,11 @@ _netcmp_equate(ClientData clientData,
 			(tp2->flags & CELL_PLACEHOLDER)) {
 		if (tp1->flags & CELL_PLACEHOLDER) {
 		    Fprintf(stdout, "Warning: Equate pins:  cell %s "
-			"has no definition, treated as a black box.\n", name1);
+			"is a placeholder, treated as a black box.\n", name1);
 		}
 		if (tp2->flags & CELL_PLACEHOLDER) {
 		    Fprintf(stdout, "Warning: Equate pins:  cell %s "
-			"has no definition, treated as a black box.\n", name2);
+			"is a placeholder, treated as a black box.\n", name2);
 		}
 		// If a cell in either circuit is marked as a black box, then
 		// the cells in both circuits should be marked as a black box.
@@ -3059,6 +3107,12 @@ _netcmp_equate(ClientData clientData,
 	    /* Recover temporarily set global variables (see above) */
 	    Circuit1 = SaveC1;
 	    Circuit2 = SaveC2;
+
+	    /* Recover ElementClasses if forcing pins on mismatched circuits */
+	    if (doforce == TRUE) {
+	       ElementClasses = saveEclass;
+	       NodeClasses = saveNclass;
+	    }
 	 }
 	 break;

@@ -3321,10 +3375,10 @@ _netcmp_property(ClientData clientData,
    int result, index, idx2;

    char *suboptions[] = {
-	"integer", "double", "value", "string", NULL
+	"integer", "double", "value", "string", "expression", NULL
    };
    enum SubOptionIdx {
-	INTEGER_IDX, DOUBLE_IDX, VALUE_IDX, STRING_IDX
+	INTEGER_IDX, DOUBLE_IDX, VALUE_IDX, STRING_IDX, EXPRESSION_IDX
    };

    /* Note: "merge" has been deprecated, but kept for backwards compatibility.	*/
@@ -3418,9 +3472,15 @@ _netcmp_property(ClientData clientData,
 	    GlobalParallelNone = FALSE;
 	    SetParallelCombine(TRUE);
 	}
+	else if (!strcmp(Tcl_GetString(objv[2]), "connected")) {
+	    GlobalParallelOpen = FALSE;
+	}
+	else if (!strcmp(Tcl_GetString(objv[2]), "open")) {
+	    GlobalParallelOpen = TRUE;
+	}
 	else {
-	    Tcl_SetResult(interp, "Bad option, should be property parallel none|all",
-			NULL);
+	    Tcl_SetResult(interp, "Bad option, should be property parallel "
+			"none|all|connected", NULL);
 	    return TCL_ERROR;
 	}
 	return TCL_OK;
@@ -3707,6 +3767,11 @@ _netcmp_property(ClientData clientData,
 			 		PropertyString(tp->name, fnum,
 						Tcl_GetString(tobj1), ival, NULL);
 					break;
+				case EXPRESSION_IDX:
+			 		PropertyString(tp->name, fnum,
+						Tcl_GetString(tobj1), 0,
+						Tcl_GetString(tobj3));
+					break;
 			    }
 			    break;
 		    }
@@ -3982,39 +4047,14 @@ _netcmp_permute(ClientData clientData,
 /* Formerly: x						*/
 /* Results:						*/
 /* Side Effects:					*/
+/* Notes:  Deprecated, retained for compatibility.	*/
 /*------------------------------------------------------*/

 int
 _netcmp_symmetry(ClientData clientData,
    Tcl_Interp *interp, int objc, Tcl_Obj *CONST objv[])
 {
-   char *fastfull[] = {
-      "fast", "full", NULL
-   };
-   enum OptionIdx {
-      FAST_IDX, FULL_IDX
-   };
-   int result, index;
-
-   if (objc == 1)
-      index = -1;
-   else {
-      if (Tcl_GetIndexFromObj(interp, objv[1], (CONST84 char **)fastfull,
-		"option", 0, &index) != TCL_OK)
-         return TCL_ERROR;
-   }
-
-   switch(index) {
-      case FAST_IDX:
-	 FastSymmetryBreaking = TRUE;
-	 break;
-      case FULL_IDX:
-	 FastSymmetryBreaking = FALSE;
-	 break;
-   }
-   Printf("Symmetry breaking method: %s.\n", 
-	     FastSymmetryBreaking ? "FAST" : "FULL");
-
+   Printf("Symmetry breaking method has been deprecated.\n");
   return TCL_OK;
 }
@@ -1 +1 @@
 .5.166
 .5.220