Merge branch 'master' into netgen-1.5

to bus pins over an array of instances.  Takes care of the three
situations where the length of the signal bus equals the number of
instances;  where the length of the signal bus is a multiple of
the number of instances;  and where the number of instances is a
multiple of the length of the signal bus.

Makefile

@@ -9,7 +9,7 @@ MODULES = base
 MAKEFLAGS =
 INSTALL_CAD_DIRS = lib doc
 
-include defs.mak
+-include defs.mak
 
 all:	$(ALL_TARGET)
 

VERSION

@@ -1 +1 @@
-1.5.137
+1.5.145

base/flatten.c

@@ -259,7 +259,7 @@ int flattenInstancesOf(char *name, int fnum, char *instance)
   struct  nlist *ChildCell;
   struct objlist *tmp, *ob2, *ob3;
   int	notdone, rnodenum;
-  char	tmpstr[200];
+  char	tmpstr[1024];
   int	nextnode, oldmax, numflat = 0;
 #if !OLDPREFIX
   int     prefixlength;
@@ -1166,7 +1166,7 @@ struct nlist *cleanuppins(struct hashlist *p, void *clientdata)
           while (ob && obt && (ob->type > FIRSTPIN || ob == firstpin) &&
 			ob->model.class != NULL) {
 	     nob = ob->next;
-	     if ((obt->type == PORT) && (obt->node == -1)) {
+	     if ((obt->type == PORT) && (obt->node == -2)) {
 
 	        /* Remove this pin */
 
@@ -1238,7 +1238,7 @@ int CleanupPins(char *name, int filenum)
 
    for (ob = ThisCell->cell; ob != NULL; ob = ob->next) {
       if (ob->type != PORT) break;
-      if (ob->node == -1) {
+      if (ob->node == -2) {
 	 needscleanup = 1;
 	 break;
       }
@@ -1265,7 +1265,7 @@ int CleanupPins(char *name, int filenum)
       }
       else if (ob->type != PORT) break;
       nob = ob->next;
-      if (ob->node == -1) {
+      if (ob->node == -2) {
 	 if (lob == NULL) {
 	    ThisCell->cell = ob->next;
 	 }
@@ -1539,7 +1539,7 @@ PrematchLists(char *name1, int file1, char *name2, int file2)
 	/* (it without regard to cell1) improves the matching.	*/
 
 	else if ((ecomp->num1 != ecomp->num2) && (ecomp->cell2 != NULL) &&
-			(ecomp->cell2->class == CLASS_SUBCKT)) {
+			(ecomp->num2 != 0) && (ecomp->cell2->class == CLASS_SUBCKT)) {
 	    ecomp->add2 = -ecomp->num2;
 	    match = 1;
 	    for (ob2 = ecomp->cell2->cell; ob2; ob2 = ob2->next) {
@@ -1597,7 +1597,7 @@ PrematchLists(char *name1, int file1, char *name2, int file2)
 	/* (it without regard to cell1) improves the matching.	*/
 
 	else if ((ecomp->num1 != ecomp->num2) && (ecomp->cell1 != NULL) &&
-			(ecomp->cell1->class == CLASS_SUBCKT)) {
+			(ecomp->num1 != 0) && (ecomp->cell1->class == CLASS_SUBCKT)) {
 	    ecomp->add1 = -ecomp->num1;
 	    match = 1;
 	    for (ob2 = ecomp->cell1->cell; ob2; ob2 = ob2->next) {

base/netcmp.c

@@ -3825,6 +3825,51 @@ void series_sort(struct objlist *ob1, struct nlist *tp1, int idx1, int run)
    }
    obp->next = obn;	/* Restore last link */
 
+   // In series runs, all records after the first start with tag "+".
+   // If the tag got moved to the first record, then move it down to
+   // the record that is missing the tag.
+
+   obn = ob1->next;
+   if (!strcmp(obn->instance.props[0].key, "_tag")) {
+      char *tmpkey;
+      struct valuelist *kv2;
+      int l;
+
+      if (!strcmp(obn->instance.props[0].value.string, "+")) {
+	 /* Remove this property tag "+" */
+	 FREE(obn->instance.props[0].key);
+	 FREE(obn->instance.props[0].value.string);
+	 for (p = 0;; p++) {
+	    obn->instance.props[p].key = obn->instance.props[p + 1].key;
+	    obn->instance.props[p].type = obn->instance.props[p + 1].type;
+	    obn->instance.props[p].value = obn->instance.props[p + 1].value;
+	    if (obn->instance.props[p].type == PROP_ENDLIST) break;
+	 }
+	 for (i = 1; i < run; i++) {
+	    obn = obn->next;
+	    if (strcmp(obn->instance.props[0].key, "_tag")) {
+	       for (p = 1;; p++) 
+		  if (obn->instance.props[p].type == PROP_ENDLIST) break;
+
+	       /* Create a new property record to hold all the existing	*/
+	       /* properties plus the tag at the beginning.		*/
+
+	       kv2 = (struct valuelist *)MALLOC((p + 2) * sizeof(struct valuelist));
+	       kv2->key = strsave("_tag");
+	       kv2->type = PROP_STRING;
+	       kv2->value.string = (char *)MALLOC(2);
+	       kv2->value.string[0] = '+';
+	       kv2->value.string[1] = '\0';
+	       for (l = 0; l <= p; l++)
+		  kv2[l + 1] = obn->instance.props[l];
+	       FREE(obn->instance.props);
+	       obn->instance.props = kv2;
+	       break;
+	    }
+	 }
+      }
+   }
+
    FREE(proplist);
 }
 
@@ -4135,8 +4180,8 @@ void PropertySortAndCombine(struct objlist *pre1, struct nlist *tp1,
       max2 = 0;
       for (c2 = netwk2; ; c2++) {
          if (*c2 == 'D') {
-	    cnt++;
  	    run++;
+	    cnt++;
          }
          else {
             if (run > max2) {
@@ -4418,7 +4463,7 @@ int PropertyOptimize(struct objlist *ob, struct nlist *tp, int run, int series,
    // Now combine records with same properties by summing M (S).
    if (comb == FALSE) {
       for (i = 0; i < run - 1; i++) {
-	 for (j = 1; j < run; j++) {
+	 for (j = i + 1; j < run; j++) {
 	    pmatch = 0;
 	    for (p = 1; p < pcount; p++) {
 	       kl = plist[p];
@@ -4436,12 +4481,13 @@ int PropertyOptimize(struct objlist *ob, struct nlist *tp, int run, int series,
 		  if (vl == NULL) {
 		     if (kl->type != vlist[p][j]->type)
 			PromoteProperty(kl, vl2);
+		     vl = &dfltvl;
 		  }
 		  else {
 		     if (kl->type != vlist[p][i]->type)
 			PromoteProperty(kl, vl);
+		     vl2 = &dfltvl;
 		  }
-		  vl = &dfltvl;
 		  dfltvl.type = kl->type;
 		  switch (kl->type) {
 		     case PROP_STRING:
@@ -4557,7 +4603,6 @@ int PropertyOptimize(struct objlist *ob, struct nlist *tp, int run, int series,
 		  vlist[0][j]->value.ival = 0;
 	       }
 	    }
-            else j++;
 	 }
       }
    }
@@ -6729,7 +6774,7 @@ int MatchPins(struct nlist *tc1, struct nlist *tc2, int dolist)
 			/* Make a pass through circuit 1 to find out if	*/
 			/* the pin really is connected to anything, or	*/
 			/* has been left orphaned after flattening.  If	*/
-			/* disconnected, set its node number to -1.	*/
+			/* disconnected, set its node number to -2.	*/
 
 			for (obt = ob1->next; obt; obt = obt->next) {
 			   if (obt->type >= FIRSTPIN)
@@ -6737,7 +6782,7 @@ int MatchPins(struct nlist *tc1, struct nlist *tc2, int dolist)
 				 break;
 			}
 			if (obt == NULL) {
-			   ob1->node = -1;	// Will run this through cleanuppins
+			   ob1->node = -2;	// Will run this through cleanuppins
 			   needclean1 = 1;
 			}
 		     }
@@ -6884,7 +6929,7 @@ int MatchPins(struct nlist *tc1, struct nlist *tc2, int dolist)
 		  break;
 	 }
 	 if (obt == NULL) {
-	    ob2->node = -1;	// Will run this through cleanuppins
+	    ob2->node = -2;	// Will run this through cleanuppins
 	    needclean2 = 1;
 	    continue;
 	 }
@@ -6986,6 +7031,7 @@ int MatchPins(struct nlist *tc1, struct nlist *tc2, int dolist)
       else if (ob1 != NULL && ob1->type == PORT) {
 	 /* Disconnected node was not meaningful, has no pin match in	*/
 	 /* the compared circuit, and so should be discarded.		*/
+	 ob1->node = -2;
 	 needclean1 = 1;
 
 	 /* Adjust numbering around removed node */

base/netfile.c

@@ -673,6 +673,7 @@ char *strdtok(char *pstring, char *delim1, char *delim2)
     /* accordingly (needs to be done).						*/
 
     if (*s == '\\') {
+        s++;
         while (*s != '\0') {
 	    if ((*s == ' ') || (*s == '\\')) {
 		s++;

base/query.c

@@ -801,9 +801,12 @@ void DescribeInstance(char *name, int file)
   {
     if (ob->node > nodemax) nodemax = ob->node;
     else if ((ob->node == -1) && (ob->model.port != PROXY)) {
-      if (disconnectednodes == 0) Fprintf(stderr, "\n");
-      disconnectednodes++;
-      Fprintf(stderr, "Cell %s disconnected node: %s\n", tp->name, ob->name);
+      if (!(tp->flags & CELL_PLACEHOLDER))
+      {
+	if (disconnectednodes == 0) Fprintf(stderr, "\n");
+        disconnectednodes++;
+        Fprintf(stderr, "Cell %s disconnected node: %s\n", tp->name, ob->name);
+      }
     }
   }
   instlist = (unsigned char *) CALLOC((nodemax + 1), sizeof(unsigned char));

base/spice.c

@@ -1983,11 +1983,15 @@ void IncludeSpice(char *fname, int parent, struct cellstack **CellStackPtr,
 	if (strchr(fname, '.') == NULL) {
            SetExtension(name, fname, SPICE_EXTENSION);
            filenum = OpenParseFile(name, parent);
-	}
-        if (filenum < 0) {
-           Fprintf(stderr,"Error in SPICE file include: No file %s\n",name);
-           return;
+	   if (filenum < 0) {
+             Fprintf(stderr, "Error in SPICE file include: No file %s\n", name);
+             return;
+	   }
         }    
+        else {
+          Fprintf(stderr, "Error in SPICE file include: No file %s\n", fname);
+          return;
+	}
      }
   }
   ReadSpiceFile(fname, parent, CellStackPtr, blackbox);

base/verilog.c

@@ -283,7 +283,7 @@ int GetBusTok(struct bus *wb)
 
 int GetBus(char *astr, struct bus *wb)
 {
-    char *colonptr, *brackstart, *brackend, *sigend, sdelim;
+    char *colonptr, *brackstart, *brackend, *sigend, sdelim, *aastr;
     int result, start, end;
 
     if (wb == NULL) return 0;
@@ -325,15 +325,22 @@ int GetBus(char *astr, struct bus *wb)
 	return 0;
     }
 
-    brackstart = strchr(astr, '[');
+    // Delimiters may appear in backslash-escaped names. . . ignore these.
+    aastr = astr;
+    if (*aastr == '\\') {
+	aastr++;
+	while (*aastr != ' ' && *aastr != '\\' && *aastr != '\0') aastr++;
+    }
+
+    brackstart = strchr(aastr, '[');
     if (brackstart != NULL) {
-	brackend = strchr(astr, ']');
+	brackend = strchr(aastr, ']');
 	if (brackend == NULL) {
 	    Printf("Badly formed array notation \"%s\"\n", astr);
 	    return 1;
 	}
 	*brackend = '\0';
-	colonptr = strchr(astr, ':');
+	colonptr = strchr(aastr, ':');
 	if (colonptr) *colonptr = '\0';
 	result = sscanf(brackstart + 1, "%d", &start);
 	if (colonptr) *colonptr = ':';
@@ -1558,19 +1565,40 @@ nextinst:
 	    // Check if net name is a wire bus or portion of a bus
 	    if (GetBus(scan->net, &wb) == 0) {
 		int range;
+
+		// This takes care of three situations:
+		// (1) The signal bus length matches the number of instances:
+		//     apply one signal per instance.
+		// (2) The signal bus length is a multiple of the number of instances:
+		//     apply a signal sub-bus to each instance.
+		// (3) The number of instances is a multiple of the signal bus length:
+		//     apply the same signal to each instance.
+
 		if ((arrayend - arraystart) == (wb.end - wb.start)) {
 		    // Net is a bus, but net is split over arrayed instances
 		    Port(scan->name);
 		}
 		else if (wb.start > wb.end) {
-		    range = wb.start - wb.end;
+		    if ((arraystart - arrayend) > (wb.start - wb.end))
+			range = (((arraystart - arrayend) + 1) /
+				    ((wb.start - wb.end) + 1)) - 1;
+		    else
+			range = (((wb.start - wb.end) + 1) /
+				    ((arraystart - arrayend) + 1)) - 1;
+
 		    for (i = range; i >= 0; i--) {
 			sprintf(defport, "%s[%d]", scan->name, i);
 			Port(defport);
 		    }
 		}
 		else {
-		    range = wb.end - wb.start;
+		    if ((arrayend - arraystart) >  (wb.end - wb.start))
+			range = (((arrayend - arraystart) + 1) /
+				    ((wb.end - wb.start) + 1)) - 1;
+		    else
+			range = (((wb.end - wb.start) + 1) /
+				    ((arrayend - arraystart) + 1)) - 1;
+
 		    for (i = 0; i <= range; i++) {
 			sprintf(defport, "%s[%d]", scan->name, i);
 			Port(defport);
@@ -2036,11 +2064,15 @@ void IncludeVerilog(char *fname, int parent, struct cellstack **CellStackPtr,
 	if (strchr(fname, '.') == NULL) {
            SetExtension(name, fname, VERILOG_EXTENSION);
            filenum = OpenParseFile(name, parent);
+	   if (filenum < 0) {
+	      fprintf(stderr,"Error in Verilog file include: No file %s\n", name);
+	      return;
+	   }
         }
-	if (filenum < 0) {
+	else {
 	   fprintf(stderr,"Error in Verilog file include: No file %s\n", fname);
 	   return;
-        }    
+        }
      }
   }
   ReadVerilogFile(fname, parent, CellStackPtr, blackbox);

tcltk/tclnetgen.c

@@ -2959,15 +2959,35 @@ _netcmp_equate(ClientData clientData,
 
       case PINS_IDX:
 	 if ((ElementClasses == NULL) && (auto_blackbox == FALSE)) {
-	    if (CurrentCell == NULL)
+	    if (CurrentCell == NULL) {
 		Fprintf(stderr, "Equate elements:  no current cell.\n");
-	    Fprintf(stderr, "Equate pins:  cell %s and/or %s has no elements.\n",
-			name1, name2);
-	    Tcl_SetObjResult(interp, Tcl_NewBooleanObj(0));
-	    return TCL_OK;
+		Tcl_SetObjResult(interp, Tcl_NewBooleanObj(0));
+		return TCL_OK;
+	    }
+	    else if ((tp1->flags & CELL_PLACEHOLDER) ||
+			(tp2->flags & CELL_PLACEHOLDER)) {
+		if (tp1->flags & CELL_PLACEHOLDER) {
+		    Fprintf(stdout, "Warning: Equate pins:  cell %s "
+			"has no definition, treated as a black box.\n", name1);
+		}
+		if (tp2->flags & CELL_PLACEHOLDER) {
+		    Fprintf(stdout, "Warning: Equate pins:  cell %s "
+			"has no definition, treated as a black box.\n", name2);
+		}
+		// If a cell in either circuit is marked as a black box, then
+		// the cells in both circuits should be marked as a black box.
+		tp1->flags |= CELL_PLACEHOLDER;
+		tp2->flags |= CELL_PLACEHOLDER;
+	    }
+	    else {
+		Fprintf(stdout, "Equate pins:  cell %s and/or %s "
+			"has no elements.\n", name1, name2);
+		Tcl_SetObjResult(interp, Tcl_NewBooleanObj(0));
+		return TCL_OK;
+	    }
 	 }
-	 else if (ElementClasses == NULL) {
-	    /* This has been called outside of a netlist compare,	*/
+	 if (ElementClasses == NULL) {
+	    /* This may have been called outside of a netlist compare,	*/
 	    /* probably to force name matching of pins on black-box	*/
 	    /* devices.  But MatchPins only works if tp1 == Circuit1	*/
 	    /* and tp2 == Circuit2, so preserve these values and 	*/