the serial combination routine was disabled so as not to post a
non-working version, since the parallel/serial property networks
are not analyzed. This should be completed soon.
making any subcircuit serializable by using the new command option
"property (device) serial|parallel enable|disable". Note that as
of this commit, serial device detection is enabled but serial
networks are not collapsed for matching, which will tend to lead
to property errors in serial devices until this code is added,
which should be in a day or two.
an instance property did not match the cell property type, as
long as the cell property types of the two compared cells matched.
Along with a recent change that left "M" as a type double during
SPICE netlist read-in, this caused "M" mismatches to be ignored,
because the double value was ignored and the integer value was
always zero.
avoid the problem where non-critical properties cause devices not
to match, resulting in apparent mismatches of matched devices.
The current behavior now prints a statement about each device.
However, the result is still somewhat ambiguous.
as failing on certain compilers. This undoubtedly reflects some
change in gcc or the OS setup, but since modern compilers should
be able to figure out for themselves when to inline a subroutine
(or not), the inline hint is somewhat arcane and unnecessary.
'ignore class', but removes instances of the specified class whose
pins are shorted together. Currently requires that all pins must
be shorted together.
leading '/' of pin names and therefore failing to print anything;
(2) Corrected 'addproxies', which was ending abruptly at the end of
a circuit's object list, such that if an instance needing proxy pins
added was the last object in the circuit, it would not get the proxy
pins added, and therefore would fail LVS.
include calculations of effective width due to the addition of
width of multiple device instances in parallel. The original
behavior of splitting all "M=" devices into individual instances
has been effectively inverted, instead combining all parallel
devices of the same class into one, with multiple property
records for devices with non-matching properties (e.g., width,
length, etc.). Property matching combines devices with different
"critical properties" (e.g., FET gate width) if these are defined
in the setup using the "property merge" command.
Not yet done: Matching of multiple property records when
critial properties are not defined, handling of critical properties
that combine in parallel instead of simple addition, handling of
devices that combine in series, and the combination of non-critical
properties (e.g., source and drain area, although these are usually
removed from matching).
based on properties that can be traded with number of devices,
such as MOSFET width, by merging. This initial implementation
is somewhat limited, only dealing with properties that merge
by summing. Only devices that do not match at all in the other
circuit will be considered for merging. The feature includes
a command option "property ... merge ..." that allows control
over which devices can and cannot be merged.
variables to iterate over hash table contents. This led to the
inability to nest hash table iterators. Fixed by defining a
wrapper structure that holds the actual hash table plus the size
and iterator indexes. Not only does this solve the nesting
problem, but it also avoids the need to pass the hash table size
on every call, and that reduces the number of ways a hash table
subroutine can go wrong (e.g., cannot access the table out of
bounds simply by passing a size that is larger than was used to
initialize the table).
comparisons between, duplicate cells (cells with the same netlist
that may have more than one name in a circuit, or which for some
reason appear with the same name more than once in a netlist).
Added more checks to the list prematching, which prevents various
troubles with cells having a mismatched hierarchy. Added a
command option to "flatten class" to flatten instances only within
a specific cell. Corrected one error in the pin matching routine.
Added a check in the pin matching routine to look for pins that
have been found to be no-connects after cleaning up the pin lists
of the children of that cell.
equates class "a" in circuit 1 with class "b" in circuit2, and
if circuit 1 has a class called "b" and/or circuit 2 has a class
called "a", then both classes are given a new hash to avoid
conflicts with the (presumably) unrelated cells of the same name
in the other netlist.
comparison would look for matching names from the "equate
classes" command. However, it failed to do the reverse
check, which is to make sure that if no forced match was
found for a cell, but there was a name match, that the
name-matched cell found is not being forcibly matched to
something else.
that matches explicitly called out in the setup file using
"equate classes" will take precedence over same-name matching,
instead of the other way around.
Tim Edwards