Changed behavior of property mismatch reporting. This is to help
avoid the problem where non-critical properties cause devices not to match, resulting in apparent mismatches of matched devices. The current behavior now prints a statement about each device. However, the result is still somewhat ambiguous.
This commit is contained in:
Tim Edwards
parent
646b351ee5
commit
0205902baa
388
base/netcmp.c
388
base/netcmp.c
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@ -3582,6 +3582,7 @@ int PropertyMatch(struct objlist *ob1, struct objlist *ob2, int do_print)
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int mismatches = 0, i, j;
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int vlstart, islop, t1type, t2type;
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int mult1, mult2, ival1, ival2;
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int rval = 1;
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double pd, dslop, dval1, dval2;
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tc1 = LookupCellFile(ob1->model.class, Circuit1->file);
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@ -3616,11 +3617,13 @@ int PropertyMatch(struct objlist *ob1, struct objlist *ob2, int do_print)
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if (t1type == PROPERTY) PropertyOptimize(tp1, tc1);
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if (t2type == PROPERTY) PropertyOptimize(tp2, tc2);
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if (t1type != PROPERTY) {
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// t1 has no properties. See if t2's properties are required
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// to be checked. If so, flag t1 as missing required properties
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while(1) {
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if (t1type != PROPERTY) {
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// t1 has no properties. See if t2's properties are required
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// to be checked. If so, flag t2 instance as unmatched
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for (i = 0;; i++) {
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mismatches++;
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for (i = 0;; i++) {
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vl2 = &(tp2->instance.props[i]);
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if (vl2->type == PROP_ENDLIST) break;
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if (vl2 == NULL) continue;
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@ -3631,21 +3634,22 @@ int PropertyMatch(struct objlist *ob1, struct objlist *ob2, int do_print)
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if (vl2->type == PROP_INTEGER)
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mult2 = vl2->value.ival;
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}
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}
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if (vl2->type != PROP_ENDLIST) {
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if (do_print) Fprintf(stdout, "Circuit 2 %s instance %s missing"
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" required properties.\n",
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}
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if (vl2->type != PROP_ENDLIST) {
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if (do_print) Fprintf(stdout, "Circuit 2 %s instance %s has no"
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" property match in circuit 1.\n",
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Circuit2->name, ob2->instance.name);
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return -1;
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}
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else
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return 0;
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}
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else if (t2type != PROPERTY) {
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// t2 has no properties. See if t1's properties are required
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// to be checked. If so, flag t1 as missing required properties
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rval = -1;
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}
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else
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rval = 0;
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}
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else if (t2type != PROPERTY) {
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// t2 has no properties. See if t1's properties are required
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// to be checked. If so, flag t1 instance as unmatched
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for (i = 0;; i++) {
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mismatches++;
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for (i = 0;; i++) {
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vl1 = &(tp1->instance.props[i]);
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if (vl1->type == PROP_ENDLIST) break;
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if (vl1 == NULL) continue;
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@ -3656,184 +3660,198 @@ int PropertyMatch(struct objlist *ob1, struct objlist *ob2, int do_print)
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if (vl1->type == PROP_INTEGER)
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mult1 = vl1->value.ival;
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}
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}
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if (vl1->type != PROP_ENDLIST) {
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if (do_print) Fprintf(stdout, "Circuit 1 %s instance %s missing"
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" required properties.\n",
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Circuit1->name, ob1->instance.name);
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return -1;
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}
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else
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return 0;
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}
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vlstart = 0;
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for (i = 0;; i++) {
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vl1 = &(tp1->instance.props[i]);
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if (vl1->type == PROP_ENDLIST) break;
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if (vl1 == NULL) continue;
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if (vl1->key == NULL) continue;
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/* Check if this is a "property of interest". */
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kl1 = (struct property *)HashLookup(vl1->key, &(tc1->propdict));
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if (kl1 == NULL) continue;
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/* Find the matching property in vl2. With luck, they're in order. */
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for (j = vlstart;; j++) {
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vl2 = &(tp2->instance.props[j]);
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if (vl2->type == PROP_ENDLIST) break;
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if ((*matchfunc)(vl1->key, vl2->key)) break;
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}
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if (vl2->type == PROP_ENDLIST) continue;
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if (j == vlstart) vlstart++;
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if (vl2 == NULL) continue;
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if (vl2->key == NULL) continue;
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/* Both device classes must agree on the properties to compare */
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kl2 = (struct property *)HashLookup(vl2->key, &(tc2->propdict));
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if (kl2 == NULL) continue;
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/* Watch out for uninitialized entries in cell def */
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if (vl1->type == vl2->type) {
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if (kl1->type == PROP_STRING && kl1->pdefault.string == NULL)
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SetPropertyDefault(kl1, vl1);
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if (kl2->type == PROP_STRING && kl2->pdefault.string == NULL)
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SetPropertyDefault(kl2, vl2);
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}
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if (vl1->type != vl2->type) {
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if (kl1->type != vl1->type) PromoteProperty(kl1, vl1);
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if (kl2->type != vl2->type) PromoteProperty(kl2, vl2);
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if (vl1->type != vl2->type) PromoteProperty(kl1, vl2);
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if (vl1->type != vl2->type) PromoteProperty(kl2, vl1);
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if (do_print && (vl1->type != vl2->type)) {
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if (mismatches == 0)
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Fprintf(stdout, "%s vs. %s:\n",
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ob1->instance.name, ob2->instance.name);
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Fprintf(stdout, " %s circuit1: ", kl1->key);
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switch (vl1->type) {
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case PROP_DOUBLE:
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case PROP_VALUE:
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Fprintf(stdout, "%g", vl1->value.dval);
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break;
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case PROP_INTEGER:
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Fprintf(stdout, "%d", vl1->value.ival);
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break;
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case PROP_STRING:
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Fprintf(stdout, "\"%s\"", vl1->value.string);
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break;
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case PROP_EXPRESSION:
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Fprintf(stdout, "(unresolved expression)");
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break;
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}
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Fprintf(stdout, " ");
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switch (vl2->type) {
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case PROP_DOUBLE:
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case PROP_VALUE:
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Fprintf(stdout, "%g", vl2->value.dval);
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break;
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case PROP_INTEGER:
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Fprintf(stdout, "%d", vl2->value.ival);
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break;
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case PROP_STRING:
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Fprintf(stdout, "\"%s\"", vl2->value.string);
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break;
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case PROP_EXPRESSION:
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Fprintf(stdout, "(unresolved expression)");
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break;
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}
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Fprintf(stdout, " (property type mismatch)\n");
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}
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if (vl1->type != vl2->type) mismatches++;
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if (vl1->type != PROP_ENDLIST) {
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if (do_print) Fprintf(stdout, "Circuit 1 %s instance %s has no"
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" property match in Circuit 2.\n",
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Circuit1->name, ob1->instance.name);
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rval = -1;
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}
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else
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rval = 0;
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}
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else switch (kl1->type) {
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case PROP_DOUBLE:
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case PROP_VALUE:
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dval1 = vl1->value.dval;
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dval2 = vl2->value.dval;
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else {
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dslop = MAX(kl1->slop.dval, kl2->slop.dval);
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pd = 2 * fabs(dval1 - dval2) / (dval1 + dval2);
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if (pd > dslop) {
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if (do_print) {
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if (mismatches == 0)
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Fprintf(stdout, "%s vs. %s:\n",
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ob1->instance.name, ob2->instance.name);
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Fprintf(stdout, " %s circuit1: %g circuit2: %g ",
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kl1->key, dval1, dval2);
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if (vl1->value.dval > 0.0 && vl2->value.dval > 0.0)
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Fprintf(stdout, "(delta=%.3g%%, cutoff=%.3g%%)\n",
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100 * pd, 100 * dslop);
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else
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Fprintf(stdout, "\n");
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}
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mismatches++;
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}
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break;
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case PROP_INTEGER:
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ival1 = vl1->value.ival;
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ival2 = vl2->value.ival;
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vlstart = 0;
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for (i = 0;; i++) {
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vl1 = &(tp1->instance.props[i]);
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if (vl1->type == PROP_ENDLIST) break;
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if (vl1 == NULL) continue;
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if (vl1->key == NULL) continue;
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islop = MAX(kl1->slop.ival, kl2->slop.ival);
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if (abs(ival1 - ival2) > islop) {
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if (do_print) {
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if (mismatches == 0)
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Fprintf(stdout, "%s vs. %s:\n",
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/* Check if this is a "property of interest". */
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kl1 = (struct property *)HashLookup(vl1->key, &(tc1->propdict));
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if (kl1 == NULL) continue;
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/* Find the matching property in vl2. With luck, they're in order. */
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for (j = vlstart;; j++) {
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vl2 = &(tp2->instance.props[j]);
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if (vl2->type == PROP_ENDLIST) break;
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if ((*matchfunc)(vl1->key, vl2->key)) break;
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}
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if (vl2->type == PROP_ENDLIST) continue;
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if (j == vlstart) vlstart++;
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if (vl2 == NULL) continue;
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if (vl2->key == NULL) continue;
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/* Both device classes must agree on the properties to compare */
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kl2 = (struct property *)HashLookup(vl2->key, &(tc2->propdict));
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if (kl2 == NULL) continue;
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/* Watch out for uninitialized entries in cell def */
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if (vl1->type == vl2->type) {
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if (kl1->type == PROP_STRING && kl1->pdefault.string == NULL)
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SetPropertyDefault(kl1, vl1);
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if (kl2->type == PROP_STRING && kl2->pdefault.string == NULL)
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SetPropertyDefault(kl2, vl2);
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}
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if (vl1->type != vl2->type) {
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if (kl1->type != vl1->type) PromoteProperty(kl1, vl1);
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if (kl2->type != vl2->type) PromoteProperty(kl2, vl2);
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if (vl1->type != vl2->type) PromoteProperty(kl1, vl2);
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if (vl1->type != vl2->type) PromoteProperty(kl2, vl1);
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if (do_print && (vl1->type != vl2->type)) {
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if (mismatches == 0)
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Fprintf(stdout, "%s vs. %s:\n",
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ob1->instance.name, ob2->instance.name);
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Fprintf(stdout, " %s circuit1: %d circuit2: %d ",
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kl1->key, ival1, ival2);
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if (ival1 > 0 && ival2 > 0)
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Fprintf(stdout, "(delta=%d, cutoff=%d)\n",
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abs(ival1 - ival2), islop);
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else
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Fprintf(stdout, "\n");
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Fprintf(stdout, " %s circuit1: ", kl1->key);
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switch (vl1->type) {
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case PROP_DOUBLE:
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case PROP_VALUE:
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Fprintf(stdout, "%g", vl1->value.dval);
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break;
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case PROP_INTEGER:
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Fprintf(stdout, "%d", vl1->value.ival);
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break;
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case PROP_STRING:
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Fprintf(stdout, "\"%s\"", vl1->value.string);
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break;
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case PROP_EXPRESSION:
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Fprintf(stdout, "(unresolved expression)");
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break;
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}
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Fprintf(stdout, " ");
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switch (vl2->type) {
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case PROP_DOUBLE:
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case PROP_VALUE:
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Fprintf(stdout, "%g", vl2->value.dval);
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break;
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case PROP_INTEGER:
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Fprintf(stdout, "%d", vl2->value.ival);
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break;
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case PROP_STRING:
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Fprintf(stdout, "\"%s\"", vl2->value.string);
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break;
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case PROP_EXPRESSION:
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Fprintf(stdout, "(unresolved expression)");
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break;
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}
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Fprintf(stdout, " (property type mismatch)\n");
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}
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mismatches++;
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}
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break;
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case PROP_STRING:
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islop = MAX(kl1->slop.ival, kl2->slop.ival);
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if (islop == 0) {
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if (strcasecmp(vl1->value.string, vl2->value.string)) {
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if (do_print) {
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if (mismatches == 0)
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Fprintf(stdout, "%s vs. %s:\n",
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if (vl1->type != vl2->type) mismatches++;
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}
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else switch (kl1->type) {
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case PROP_DOUBLE:
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case PROP_VALUE:
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dval1 = vl1->value.dval;
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dval2 = vl2->value.dval;
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dslop = MAX(kl1->slop.dval, kl2->slop.dval);
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pd = 2 * fabs(dval1 - dval2) / (dval1 + dval2);
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if (pd > dslop) {
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if (do_print) {
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if (mismatches == 0)
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Fprintf(stdout, "%s vs. %s:\n",
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ob1->instance.name, ob2->instance.name);
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Fprintf(stdout, " %s circuit1: \"%s\" circuit2: \"%s\" "
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"(exact match req'd)\n",
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kl1->key, vl1->value.string, vl2->value.string);
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}
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Fprintf(stdout, " %s circuit1: %g circuit2: %g ",
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kl1->key, dval1, dval2);
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if (vl1->value.dval > 0.0 && vl2->value.dval > 0.0)
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Fprintf(stdout, "(delta=%.3g%%, cutoff=%.3g%%)\n",
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100 * pd, 100 * dslop);
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else
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Fprintf(stdout, "\n");
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}
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mismatches++;
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}
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break;
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case PROP_INTEGER:
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ival1 = vl1->value.ival;
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ival2 = vl2->value.ival;
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islop = MAX(kl1->slop.ival, kl2->slop.ival);
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if (abs(ival1 - ival2) > islop) {
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if (do_print) {
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if (mismatches == 0)
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Fprintf(stdout, "%s vs. %s:\n",
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ob1->instance.name, ob2->instance.name);
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Fprintf(stdout, " %s circuit1: %d circuit2: %d ",
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kl1->key, ival1, ival2);
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if (ival1 > 0 && ival2 > 0)
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Fprintf(stdout, "(delta=%d, cutoff=%d)\n",
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abs(ival1 - ival2), islop);
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else
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Fprintf(stdout, "\n");
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}
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mismatches++;
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}
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break;
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case PROP_STRING:
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islop = MAX(kl1->slop.ival, kl2->slop.ival);
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if (islop == 0) {
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if (strcasecmp(vl1->value.string, vl2->value.string)) {
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if (do_print) {
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if (mismatches == 0)
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Fprintf(stdout, "%s vs. %s:\n",
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ob1->instance.name, ob2->instance.name);
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Fprintf(stdout, " %s circuit1: \"%s\" "
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"circuit2: \"%s\" (exact match req'd)\n",
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kl1->key, vl1->value.string,
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vl2->value.string);
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}
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mismatches++;
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}
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}
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else {
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if (strncasecmp(vl1->value.string, vl2->value.string, islop)) {
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if (do_print) {
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if (mismatches == 0)
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Fprintf(stdout, "%s vs. %s:\n",
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ob2->instance.name, ob2->instance.name);
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Fprintf(stdout, " %s circuit1: \"%s\" "
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"circuit2: \"%s\" (check to %d chars.)\n",
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kl1->key, vl1->value.string,
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vl2->value.string, islop);
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}
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mismatches++;
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}
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}
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break;
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case PROP_EXPRESSION:
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/* Expressions could potentially be compared. . . */
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if (do_print)
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Fprintf(stdout, " %s (unresolved expressions.)\n", kl1->key);
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mismatches++;
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}
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}
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else {
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if (strncasecmp(vl1->value.string, vl2->value.string, islop)) {
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if (do_print) {
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if (mismatches == 0)
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Fprintf(stdout, "%s vs. %s:\n",
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ob2->instance.name, ob2->instance.name);
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Fprintf(stdout, " %s circuit1: \"%s\" circuit2: \"%s\" "
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"(check to %d chars.)\n",
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kl1->key, vl1->value.string, vl2->value.string, islop);
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}
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mismatches++;
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}
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}
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break;
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case PROP_EXPRESSION:
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/* Expressions could potentially be compared. . . */
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if (do_print)
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Fprintf(stdout, " %s (unresolved expressions.)\n", kl1->key);
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mismatches++;
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break;
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break;
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}
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if ((vl1 == NULL && vl2 != NULL) || (vl1 != NULL && vl2 == NULL))
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rval = -1; /* Different number of properties of interest */
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}
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}
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if ((vl1 == NULL && vl2 != NULL) || (vl1 != NULL && vl2 == NULL))
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return -1; /* Different number of properties of interest */
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/* Move to the next property record */
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if (tp1) tp1 = tp1->next;
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if (tp2) tp2 = tp2->next;
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t1type = (tp1) ? tp1->type : 0;
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t2type = (tp2) ? tp2->type : 0;
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if ((t1type != PROPERTY) && (t2type != PROPERTY)) break;
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}
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return mismatches;
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return (rval < 0) ? rval : mismatches;
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}
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/*--------------------------------------------------------------*/
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Reference in New Issue