ago (and may have been, but only under limited circumstances). Do
to several errors, using "-noflatten" on the command line and using
"flatten prohibit" in a script would not prevent cells from being
flattened; the "-noflatten" list needed to be used to call "flatten
prohibit", and "flatten prohibit" needed to be fixed to flag the
specified cell instead of the top level cell where it exists.
be reported at the end if there was a port error. This is important
because port errors often resolve themselves, but the cell should not
be reported clean if the port errors resolved but it had property
errors. Also: Added a method to derive area and/or perimeter
properties from length and width, so that capacitors can be combined
in parallel without regard to which dimension is width and which is
length. This feature has only been lightly tested.
forced flattening to be done whenever any pin mismatch occurred,
which undermined the whole proxy pin method. With the proxy pins
fixed, reinstated the method of avoiding flattening when pin
issues can be trivially corrected. Also: Added output to the
pin matching for one mismatch case that was being missed.
decided that it is beneficial to break symmetries by net name;
it's just that net names should not be used before all symmetries
related to pins have been broken. So I rewrote the compare
routine to take an argument allowing or disallowing net name
matches, and make one call to break symmetries by pin name
followed by another call to break symmetries by net name. This
still solves the original problem, but does not allow symmetries
to be broken randomly on internal nets if names have been matched
in both netlists. Otherwise the output may report nets that
appear to be swapped, making the output confusing.
some errors failing to list in the output while also being responsible
for a number of non-errors showing up in the output. This fix may
substantially clean up netgen output. Also: Added text to the
output noting that pin matching may be incorrect with respect to
symmetries if the nets have failed to match.
pass the right cell name to the routine which counts the number of
pins. Using this in a setup file will prevent netgen from spending
time matching low-level devices.
with IRSIM including recent changes made to support multiple device
types using the subcircuit "x" component type. This requires
reading in a .prm file, which incidentally can be used with any
SPICE file to inform netgen of the specific component type of any
model defined as a subcircuit.
string for the setup file to be the "trivial default" previously
used in case of the setup file not being found. Put a newline
around the setup file messages so that they stand out from the
rest of the initial output information.
passed an invalid setup file, the netgen "lvs" script uses a
trivial default setup and issues no error or warning. Replaced
this behavior with an error message and a hard stop.
to have unique class hashes. This has the problem that it prevents
comparing N-to-1 cells because declaring X->X1 as equivalent breaks
the original name equivalence of X->X. The new implementation adds
the switch "-unique" to preserve the original behavior. Otherwise,
the class hashes are made the same as the 2nd cell passed to the
command, and it is the responsibility of the person running LVS to
ensure that this is done in the correct direction.
network parallel/series networks. Instead, added a global option
with command "property tolerance strict|relaxed" to reinstate the
original (strict) behavior on demand, while relaxing it by default.
This allows certain series/parallel networks to match numerically
even though the schematic netlist may have combined individual
devices.
the parallel sorting routine. This fixes occasional property
errors with series-connected devices such as resistors. (2) Added
a method to associate properties with specific pins when pins are
permutable. This allows netgen to properly check a value like
source/drain area when the definition of source and drain has
changed due to permutation of the device. (3) Added a "property"
command extension "associate" to associate a property with a pin,
for use with the method described in (2).
to the JSON format file (since JSON does not allow single backslash
characters. Previously nets had been handled correctly, but not
pins. Resolves github issue tracker Issue #60 from Proppy.
request #59 ("Pin match"). Because the pull request has rather
sweeping modifications, I am doing this in two steps. The change
that most breaks with existing comparison methods is in the
PinMatch() routine in netcmp.c, where the method of generating
proxy pins has been removed. There are specific cases for which
the proxy pin method exists, although these were coping with
issues arising from extraction in magic which have been dealt
with to some extend. Possibly the proxy pin method is no longer
needed. So the PinMatch() changes will be done in a second
commit where it's easier to revert or modify the changes without
affecting the modifications from this commit.
command option "flatten prohibit" (or "flatten deny") to prevent
a subcell from being flattened at any time during the compare
process. Previously, the "-noflatten" option for the "lvs"
script had been used to prevent flattening during initial
pre-match, but if the circuit passed the prematch phase and
subcells were mismatched, they would be flattened regardless of
whether or not they were listed by the "-noflatten" option. This
also codifies a way to prevent subcells from being flattened in
the setup file rather than in the "lvs" command line. Also:
Found and fixed a bug that prevents the use of "-noflatten=" with
a cell name or list of cell names instead of a filename.
should not be called after CreateTwoLists(). CreateTwoLists()
was being called in one case only to print the contents of the
cells, so that part was pulled out into a separate routine.
routine does not have an exact equivalent in PrematchLists() and
needs to be run beforehand. This fix keeps FlattenUnmatched()
from being run on all cells at the beginning and restricts it
to being run on the contents of individual cells during matching,
after checking if either of the cells is a black-box. Avoiding
flattening contents of one side when the other is a black-box
(or simply doesn't contain any subcircuits or devices) prevents
unnecessary flattening of cells that will never get compared.
This fixes crash on macos due to wrong hash() being linked in.
It also makes sure that proper function defs are declared and available
(as required by C99) to make compile possible in newer compilers (e.g.
Apple clang) and to some extend prevent similar linkage issues happening
again.
Changed line breaks in log and stdout to better differentiate subcircuits.
Added merged series device counts and differentiated from parallel merged device counts.
Added file number to disconnected net, merged count messages.
Changed black box errors to show file numbers instead of hard coded values.
Final error cell list changed from all on one line to one per line.
Removed redundant display in black box warning.
print statement, and clarified the messages about non-matching
circuits at the end, all of them suggestions made by Mitch
Bailey (see issue #34 on github).
saying that pins were mismatched when pin matching was never run
accidentally resulted in pin matching not being applied to black-box
entries. This has been corrected.
The algorithm is to run without exhaustive subdivision until the
last step because this is much faster. The final iteration must
be run with exhaustive subdivision on, or else it is possible to
have cells with swapped pins matching. The routines that resolve
automorphisms were setting exhaustive subdivision for the final
iteration. But simple "run converge" and "run resolve" were not.
class during setup, for the purpose of generating some derived
value that is used for merging and sorting, such as area = l*w.
Note that this likely needs adjusting so that the expression is
evaluated but not replaced for the purpose of sorting, since the
values to the parameter may change after parallel and series
merging.
cause inexplicable output in case of a property error by showing a
netlist topography error instead of a property error (but the output
shows that the netlists match, and there is no reporting of any
property errors). This error was discovered while implementing a
better sorting method for parallel combination. The improved method
sorts on two properties rather than one, and so should not fall into
the error where, say, devices are sorted on W but have different L
for a device like a capacitor where no "critical" property is
specified (and other similar cases, although that is a common one).
pins for enabling parallel combinations, which could cause a crash.
Added a "-force" option to "equate pins" to allow pins to be matched
even on subcircuits that did not correctly match; this was done in
conjuction with an extra option to the "lvs" command "-noflatten="
to pass a list of cellname to not be flattened even if they do not
match. This is generally discouraged, as it prevents netgen from
resolving differences between layout and schematic hierarchy, but it
can be useful for checking that the hierarchy above a certain cell
is correct, given that if a subcell is really unmatched, then its
errors will keep propagating up the top level, making additional
errors hard to diagnose.
can be turned on or off from the setup using "property parallel open"
to allow parallelizing devices with no-connect pins vs. "property
parallel connected" to only allow parallelizing of devices with all
pins connected.
to generate incorrect results on occasion. The method to parallelize
cells with the same no-connect pins should avoid the worst-case
symmetry breaking that was previously plaguing the LVS of large
standard-cell layouts.
R. Timothy Edwards
Kamyar Mohajerani
D. Mitch Bailey
Ahmed Ghazy