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manta/examples/nexys_a7/logic_analyzer
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Fischer Moseley 9d8836bda3 add prototype simulation replay 2023-04-17 18:14:31 -04:00
..
sim add prototype simulation replay 2023-04-17 18:14:31 -04:00
src add prototype simulation replay 2023-04-17 18:14:31 -04:00
xdc add working hand-parameterized logic analyzer! still buggy but this is super neato 🤠 2023-04-02 22:49:48 -04:00
capture.mem add prototype simulation replay 2023-04-17 18:14:31 -04:00
capture.pkl add prototype simulation replay 2023-04-17 18:14:31 -04:00
lab-bc.py add working hand-parameterized logic analyzer! still buggy but this is super neato 🤠 2023-04-02 22:49:48 -04:00
manta.yaml clean up inferred BRAM, trim whitespace 2023-04-03 21:20:36 -04:00
run_logic_analyzer.py add prototype simulation replay 2023-04-17 18:14:31 -04:00