Fischer Moseley
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ab8582a570
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move building examples into makefile, add working logic analyzer test
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2023-04-03 23:47:36 -04:00 |
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Fischer Moseley
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c604614428
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autogenerate logic_analyzer and sample_mem
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2023-04-03 23:15:09 -04:00 |
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Fischer Moseley
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ce41d7ec41
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clean up inferred BRAM, trim whitespace
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2023-04-03 21:20:36 -04:00 |
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Fischer Moseley
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f682e5386f
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add working hand-parameterized logic analyzer! still buggy but this is super neato 🤠
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2023-04-02 22:49:48 -04:00 |
Fischer Moseley
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a562c8136c
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add ability to autodetect serial port
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2023-03-23 20:46:49 -04:00 |
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Fischer Moseley
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aa2ba43e8f
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rename lut mem to lut ram, add to manta generator
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2023-03-14 16:24:56 -04:00 |