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manta
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add some functional sim to github actions

This commit is contained in:
Fischer Moseley 2023-02-04 12:52:52 -05:00
parent 514179fc0a
commit 5c4d82698a
4 changed files with 13 additions and 2 deletions
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.github/workflows/run_all_tests.yml → .github/workflows/cross_platform_tests.yml vendored
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.github/workflows/formal_verification.yml vendored Normal file
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.github/workflows/functional_simulations.yml vendored Normal file
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name: functional_simulations
on: [push]
jobs:
uart:
runs-on: ubuntu-latest
uses: actions/checkout@v3
uses: install-iverilog-apt
steps:
- run: iverilog -g2012 -o sim.out test/uart_tb.sv src/uart_tx.sv src/uart_rx.sv
- run: vvp sim.out

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README.md
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![](assets/manta.png)
![Functional Simulation](https://github.com/fischermoseley/manta/actions/workflows/run_all_tests.yml/badge.svg)
![Formal Verification](https://github.com/fischermoseley/manta/actions/workflows/run_all_tests.yml/badge.svg)
![functional_simulation](https://github.com/fischermoseley/manta/actions/workflows/functional_simulation.yml/badge.svg)
![formal_verification](https://github.com/fischermoseley/manta/actions/workflows/formal_verification.yml/badge.svg)
![cross_platform_tests](https://github.com/fischermoseley/manta/actions/workflows/cross_platform_tests.yml/badge.svg)
Manta is a tool for debugging FPGA designs over UART. It has two modes for doing this, downlink and uplink. The downlink mode feels similar to a logic analyzer, in that Manta provides a waveform view of a configurable set of signals, which get captured when some trigger condition is met. The uplink mode allows a host machine to remotely set values of registers on the FPGA via a python interface. This permits rapid prototyping of logic in Python, and a means of incrementally migrating it to HDL. A more detailed description of each mode is below.