(Take two)
+ Adds a GitHub Actions flow that builds an AppImage (see AppImages.org) that can produce a monolithic magic binary
~ Fix a portability issue in tcltk/magic.sh.in
This binary should theoretically work on any Linux distro with Glibc 2.3+ and Cairo 1.8+, which is any up to date distro in the last decade.
transferred when doing a node merge, which can cause named
terminals to get lost, because there is no longer a node with
a name corresponding to the terminal. The node gets a default
name which is not the terminal name, and the netlist is broken.
recognized as a valid command when file locking has been disabled as
a compile-time option. The command then generates an error on
"locking enable" but simply ignores the command "locking disable".
gates when the gate length minimum may be larger than the gate
width minimum, and to implement an "angles" option on the "width"
rule that can implement rules where a layer width must be wider
as measured from angled edges than from straight edges.
the "width" rule is assumed to be symmetric, and not checked in all
four directions, as that would be redundant. But non-Manhattan tiles
are not symmetric and must be checked all four directions. Implemented
in a way that does not increase the DRC processing time.
shrink routine that over-computes the diagonal position (the
equation failed to divide the intersecting angle in half).
Rewrote the equation for the correct grow distance, still
accounting for the grid limit (if set).
substrate shielding types in a subcell inside the interaction area
only. Since the interaction area is clipped by the "cookie cutter"
extraction areas, it could completely miss the shielding. As
revised, any shielding under a subcell will effectively shield the
entire subcell. This could be improved by warning if the subcell
has substrate connections outside of the shield area (as that is
not extractable), but that requires additional processing.
When running preproc.py, use the python3 that the configure script found
instead of assuming (via preproc.py's #! line) that it is called
"python3" and is located in PATH. This allows the user to specify a
different python3 by running e.g.:
./configure ac_cv_path_PYTHON3=/path/to/python3
fact that "extract all" does not enumerate cells from bottom up
as I had assumed---The order is roughly bottom-to-top, but cells
re-used in different places in the hierarchy could end up called
before one or more of their own subcells is extracted. Since
this conflicted with the preparation of the substrate in each
extracted subcircuit, I changed the method to enumerate cells so
that it is properly bottom-to-top. Also, methods were added to
"extract" (incremental), "extract cell", and "extract parents"
to ensure that the substrate is prepared on all subcells before
extraction.
extFindNodes() does; consequently, ExtLabelRegions() when called
after ExtFindRegions() may accidentally chain together a substrate
region with whatever was left in this linked list after the
previous call to extFindNodes(), with unpredictable results.
DEF reading to use vector fonts on PIN labels, with some ad hoc
rules for size and rotation (may need refinement). Modified the
DEF annotation (def read -annotate) so that the preferred position
of labels is on a wire leading out from a pin connection, which
is a "safer" place to put it, in case the layout was manually
edited between the DEF read and annotation. Fixed another two
crash conditions related to read-only views. Corrected a startup
error caused by an uninitialized variable used by the "wiring"
section of the tech file.
to be annotated from a DEF file. This is particularly useful if
"def read" has been used without the "-labels" option, and the
labels are needed at some point.
linking it to Tk or X11 graphics. Added new command "display" which
returns the display type, which is good for finding out if the
display is "NULL". Added code to allow the wrapper to be defined
for NULL graphics with the Tk console, the main necessities of which
are to remove the "openwrapper" command, and to return immediately
from a number of tag callback functions.
in github issue #149. This causes magic to no longer write log files
for "make" and "make install" but will properly exit with a non-zero
return code on any error during compile.
Also: Corrected the command "tech drc surround <type1> <type2>" so
that it now returns the correct value when <type1> and <type2> are in
the same plane. Added new command "tech drc directional <type1> <type2>"
which works the same way as "tech drc surround" except for directional
surround rules. Used this to generate vias from "def write" with the
correct metal surround amounts included in the via definiton. The
route analysis then ignores tile slivers that make up the surrounding
material around contacts. Also implemented a method that handles
routes that are made of multiple thin tiles due to the maximum horizontal
stripes rule. Now magic handles "def write" well except for not dealing
with non-minimum-width routes unless they're specifically called out as
"special" nets.
is specified in the extraction section of the techfile, then magic
will compute the effect of a nearby shape partially shielding the
sidewall overlap capacitance, which approaches 100% shielding as
the shapes converge to zero separation. This method prevents
magic from vastly overestimating the fringe capacitance of closely
spaced wires, which was magic's worst problem with parasitic
accuracy. The "fringeshieldhalo" value is the distance at which
the fringe shielding becomes negligible. Typically, it will be
about three times the distance at which half the fringe value is
shielded. It may be necessary at some point to make both the
fringe shielding halo and the sidewall halo values per-type values
(or per-plane, at least). For now, it should suffice to bring
Magic's parasitic extraction back in line with other tools.
the name of the cell use if the cell use is a top level window. It
was accidentally discovered that using "select top cell ; select flat"
will do this (creating label text with spaces in the process, which is
illegal syntax for netlists).
not be seen during hierarchical processing, causing the substrate
to get split into several names that may conflict in the netlist.
At issue is the fact that ExtLabelRegions() will not attach a
default substrate label to a default substrate region. This may
need further untangling, as extFindNodes() will set the default
substrate node and is sometimes followed by ExtLabelRegions(),
which will label it. Any place ExtFindRegions() is called, this
could be an issue.
EF_SUBS_PORT flags up the hierarchy. This is a rather lot of code
needed to make substrate connections to circuits where the substrate
connects to devices but not make such connections where the substrate
doesn't. There may be simpler ways to accomplish the same thing,
depending on whether the order of "merge" statements in a .ext file
is reliable; this code does not depend on it.
number from the git repository, which is overall more reliable than
the version number, but mainly to support a common method across the
open source tools for providing information to builds like open_pdks
that may need to know what version of every tool was used for the
build.
Most of this had to do with the incorrect use of the parent's substrate
name in extHierSubstrate(). After the correction, there still remains
an issue that is caused when a labeled isolated substrate region overlaps
an extraction tile boundary. I believe that this particular error has
existed for some time and is not new, so I am committing these changes.
which had become fouled up due to the changes in the way that the
substrate is defined and handled. Worked through a large torture
test until all types of substrate coupling and overlap shielding
were resolved to be extracted as expected.
Donn
Tim Edwards
Ryan Schmidt
Johan Euphrosine
Anton Blanchard