Made some corrections to the "extresist" code to avoid issues with
extracting a port-to-port net that does not touch any devices. The error happens in a fairly rare set of cases.
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fe2eb6d390
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@ -449,12 +449,13 @@ efBuildKill(def, name)
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*/
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void
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efBuildEquiv(def, nodeName1, nodeName2)
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efBuildEquiv(def, nodeName1, nodeName2, resist)
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Def *def; /* Def for which we're adding a new node name */
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char *nodeName1; /* One of node names to be made equivalent */
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char *nodeName2; /* Other name to be made equivalent. One of nodeName1
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* or nodeName2 must already be known.
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*/
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bool resist; /* True if "extresist on" option was selected */
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{
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EFNodeName *nn1, *nn2;
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HashEntry *he1, *he2;
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@ -520,12 +521,15 @@ efBuildEquiv(def, nodeName1, nodeName2)
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freeMagic(argv[7]);
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return;
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}
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else
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else if (!resist)
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{
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/* Flag a strong warning */
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TxError("Warning: Ports \"%s\" and \"%s\" are electrically shorted.\n",
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nodeName1, nodeName2);
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}
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else
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/* Do not merge the nodes when folding in extresist parasitics */
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return;
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}
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/* If both names exist and are for different nodes, merge them */
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@ -313,7 +313,7 @@ readfile:
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/* equiv node1 node2 */
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case EQUIV:
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efBuildEquiv(def, argv[1], argv[2]);
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efBuildEquiv(def, argv[1], argv[2], resist);
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break;
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/* replaces "fet" (below) */
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@ -1499,6 +1499,7 @@ defCountVias(rootDef, MagicToLefTable, defViaTable, oscale)
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int
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defCheckFunc(tile)
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Tile *tile;
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{
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return 1;
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}
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@ -172,7 +172,9 @@ ResReadSim(simfile, fetproc, capproc, resproc, attrproc, mergeproc, subproc)
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if (resproc) result = (*resproc)(line);
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break;
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case '=':
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if (mergeproc) result = (*mergeproc)(line);
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/* Do not merge nodes, as this interferes with */
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/* extresist's primary function. */
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/* if (mergeproc) result = (*mergeproc)(line); */
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break;
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case 'A':
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if (attrproc)
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@ -710,6 +710,9 @@ resPortFunc(scx, lab, tpath, result)
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HashEntry *entry;
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ResSimNode *node;
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// Ignore the top level cell
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if (scx->scx_use->cu_id == NULL) return 0;
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GeoTransRect(&scx->scx_trans, &lab->lab_rect, &r);
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// To be expanded. Currently this handles digital signal inputs
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@ -723,7 +726,8 @@ resPortFunc(scx, lab, tpath, result)
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// direction is either INPUT or OUTPUT, then use SIGNAL is implied.
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if ((puse == 0) && ((pclass == PORT_CLASS_INPUT)
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|| (pclass == PORT_CLASS_OUTPUT)))
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|| (pclass == PORT_CLASS_OUTPUT)
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|| (pclass == PORT_CLASS_DEFAULT)))
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puse = PORT_USE_SIGNAL;
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if (puse == PORT_USE_SIGNAL || puse == PORT_USE_CLOCK) {
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@ -742,7 +746,8 @@ resPortFunc(scx, lab, tpath, result)
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if (lab->lab_flags & PORT_DIR_WEST)
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portloc.p_x = r.r_xbot;
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if ((pclass == PORT_CLASS_INPUT) || (pclass == PORT_CLASS_OUTPUT)) {
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if ((pclass == PORT_CLASS_INPUT) || (pclass == PORT_CLASS_OUTPUT)
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|| (pclass == PORT_CLASS_DEFAULT)) {
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int len;
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char *nodename;
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