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875 Commits

Author SHA1 Message Date
Matthias Koefferlein 9543cea952 Fixed tests 2021-07-29 22:24:22 +02:00
Matthias Koefferlein 42b7290fe5 Device parameter comparer now also compares other (primary) parameters, parameters primary in both netlists are considered to be compared by default, 'ignore' feature in tolerance 2021-07-27 22:15:59 +02:00
Matthias Koefferlein 37457aa02f Spice reader flags existing parameters as primary 2021-07-27 22:13:45 +02:00
Matthias Köfferlein df022316b9
Merge pull request #877 from KLayout/drc-extent-of-cells 
Implemented extent(cell_filter) for DRC, added Layout#cells with name…
 2021-07-21 23:37:10 +02:00
Matthias Koefferlein 7a37a6b7ed Implemented extent(cell_filter) for DRC, added Layout#cells with name filter 2021-07-21 18:31:51 +02:00
Matthias Koefferlein 99d980cd16 Added two useful functions for RBA/pya CellView (context_trans, context_dtrans) 2021-07-20 19:31:54 +02:00
Matthias Koefferlein 23d0fcae8d Added new tests 2021-07-19 08:32:55 +02:00
Matthias Koefferlein 2e21498422 Updated unit tests 2021-07-19 07:58:42 +02:00
Matthias Köfferlein 054bfa3be4
Merge pull request #865 from KLayout/issue-864 
Fixed #864 (Shapes#copy_shapes does not support undo/redo)
 2021-07-17 13:44:15 +02:00
Matthias Koefferlein 2fee924103 Updated the solution 2021-07-15 23:39:02 +02:00
Matthias Koefferlein 2b447854f9 Enhanced matching of blackbox/pin ambiguities 
Previously: matching of blackbox pins was enforced
by using pin names for passive nets in the compare.
Problem: no match was achieved when pins are not
named or not named consistently.

In this case, it's desirable to treat them as
ambiguous.

The new solution is to let the ambiguity resolver handle
that using an extended definition of the net names:
it will take the pin name into account if an unnamed net
is attached to a pin.

In addition, net ambiguities are projected to pin
equivalence now. This also will propagate symmetry
through nested blocks (dbNetlistCompareTests:20_BusLikeConnections).
 2021-07-08 23:54:20 +02:00
Matthias Koefferlein 4e54715d64 Merge branch 'wip-lvs' 2021-07-06 23:40:44 +02:00
Matthias Köfferlein d10a28e96a
Merge pull request #850 from KLayout/ruby-3-enabling 
Ruby 3 enabling
 2021-07-06 23:38:40 +02:00
Matthias Köfferlein e78d0d81ae
Merge pull request #849 from KLayout/lvs-blackbox 
Lvs blackbox
 2021-07-06 23:38:21 +02:00
Matthias Koefferlein 8f65ab099f Fixed DeviceClass assignment operator 2021-07-06 07:56:27 +02:00
Matthias Koefferlein 4e0d8d92ef Updated doc, reverted netlist writer to write all parameters - it will only write primary parameters for R, L and C 2021-07-05 22:45:40 +02:00
Matthias Koefferlein 24c34f1d60 Updated test data 2021-07-05 22:29:33 +02:00
Matthias Koefferlein e34fc8967a Some enhancements 
* Device#net_for_terminal with terminal name
* Spice writer now dumps all parameters for resistors and caps (also secondary)
* Enabled Spice writer delegate in LVS (spice_format(...))
* Device class factories for built-in device extractors
 2021-07-05 22:22:13 +02:00
Matthias Koefferlein ba35ac9bfe Doc update, some tests 2021-07-05 21:06:02 +02:00
Matthias Koefferlein 1a0b05e663 Updated test data 2021-07-02 23:38:38 +02:00
Matthias Koefferlein 79c552b300 Fixed #858 (+ line continuation after blanks in Spice reader) 2021-07-02 23:31:54 +02:00
Matthias Koefferlein cd70bea9a0 Basic enabling of Ruby 3 2021-06-29 23:32:36 +02:00
Matthias Koefferlein 2d2cf11308 Added tests for new features. 2021-06-28 23:08:02 +02:00
Matthias Koefferlein ab70c42c68 Some enhancements for strong matching of nets 
* same_nets! method for strong matching
* same_nets and same_nets! except glob pattern to circuits and nets
* both observe case sensitivity
* helper functions for case sensitivity Netlist#is_case_sensitive?, Netlist#case_sensitive=
* Netlist#nets_by_name to get nets from pattern
 2021-06-28 22:33:46 +02:00
Matthias Koefferlein 72dc94197e New method: Circuit#nets_by_name 2021-06-28 20:29:40 +02:00
Matthias Koefferlein dae5d3227a Enhanced documentation for blank_circuit, consilidated 'blank_circuit' method provided which can be used anywhere 2021-06-28 19:51:57 +02:00
Matthias Koefferlein 24afd571f0 LVS: can be used anywhere now: tolerance and join_symmetric_nets 2021-06-28 18:56:07 +02:00
Matthias Koefferlein c24c0933bf Bugfix: blackbox mode/abstract pins 
Abstract pins are created when pins are not attached to any or only to passive nets
(passive nets are those without device terminals or subcircuit pins).

1. Such pins were treated swappable. Now named pins will not be treated
   swappable but are mapped by name. This enables blackbox models where
   the pins are labelled and must correspond to schematic pins.
2. A bug was present which lead to incorrect handling of abstract
   nets in net compare.
 2021-06-27 22:56:28 +02:00
Matthias Koefferlein 1d42711b65 Updated test data 2021-06-27 16:07:10 +02:00
Matthias Koefferlein 881e0010d5 Implemented with(out)_angle, with(out)_area on edge pairs (DRC, GSI). Deprecated 'with(out)_angle' on polygon layers (DRC) as this is now redundant with 'corners' 2021-06-27 14:18:04 +02:00
Matthias Koefferlein 5251520876 Added more filters for edge pairs: with_area, with_internal_angle. Added tests 2021-06-21 23:44:48 +02:00
Matthias Koefferlein 4d9b27a017 Updated test data 2021-06-11 00:03:37 +02:00
Matthias Koefferlein 4c3729631a Rework: need to properly parse NAME records in map files, adjusted test data 2021-06-08 22:49:22 +02:00
Matthias Koefferlein 15c97123b5 Changed test data to OASIS for better compression 2021-06-07 23:03:26 +02:00
Matthias Koefferlein bfc534fa45 Fixed #826 - added test 2021-06-07 23:01:05 +02:00
Matthias Koefferlein 378a3b9045 Updated test data 2021-05-31 18:47:52 +02:00
Matthias Koefferlein eeaab8a417 Bugfix: Region#flatten and Edges#flatten did not update the merged cache to flat and Region#flatten did not produce PolygonRefs 2021-05-29 19:28:56 +02:00
Matthias Koefferlein 5ceeafc0ff Implemented #808 (Feature suggestion: DRC to report edges attached to corners as edge pairs). Solution is available for DRC layers and universal DRC expressions. 2021-05-29 17:57:38 +02:00
Matthias Koefferlein fd1e206c56 Provide a solution for #809 (density goes outside the area) 2021-05-29 10:16:30 +02:00
Matthias Koefferlein c8548709bb Implemented edge pair filters, DRC: with(out)_angle, with(out)_length and with(out)_distance 2021-05-28 23:46:52 +02:00
Matthias Koefferlein fcb966393a Fixed #806: first, the internal error gone. Second, the implementation of custom comparers is simplified as the 'equals' method does not need to be implemented. 2021-05-26 22:39:28 +02:00
Matthias Koefferlein 2e63628ddd Fixed #805 - introducing layer.count and layout.hier_count for DRC 2021-05-26 22:11:47 +02:00
Matthias Koefferlein 660b723678 Updated test data because of non-merging hierarchical 'or' 2021-05-26 00:35:32 +02:00
Matthias Koefferlein 224c1b614b Added missing file. 2021-05-26 00:28:08 +02:00
Matthias Koefferlein 6ad8ec5662 Bugfix: whole edge output for fragmented second input. No way to fix that for the compound ops. Restrict negative output for two-layer checks on first layer for the same reason. 2021-05-26 00:27:13 +02:00
Matthias Koefferlein 94e7f0dbd3 Updated test data, fixed DRC/LVS doc. 2021-05-25 23:30:43 +02:00
Matthias Koefferlein 19b28982e7 WIP: updated test data (bugfix: bulk does not have layer properties), Fixed Region::count and Region::hier_count (was counting non-polygons too) 2021-05-25 23:08:38 +02:00
Matthias Koefferlein 1c8442f485 Fixed #807 - now supporting incremental connect and clear_connections in DRC/LVS 2021-05-24 21:56:57 +02:00
Matthias Koefferlein 05b1023fd5 Updated tests. 2021-05-24 16:49:00 +02:00
Matthias Koefferlein 0a659124f6 Merge branch 'master' of github.com:KLayout/klayout into wip 2021-05-22 17:49:24 +02:00