iverilog/tgt-vhdl
Nick Gasson e6846ea3a7 Improve memory management in VHDL target
Previously the VHDL code generator managed memory for
the AST objects by requiring that each AST element be
responsible for deleting its children. The disadvantages
of this are that it's quite easy to accidentally leak
memory by forgetting to delete a child, and no AST pointers
may be shared by multiple parents (or we'd end up with
double-deletes) -- this results in unnecessary copies of
objects being made.

There's no real need for fine-grained memory management of
AST objects since once they're allocated they tend to
persist until the code generator is about to terminate, when
they should all be freed.

This patch provides a custom new/delete operator for
vhdl_element which logs the vhdl_element objects allocated
in a std::vector (after calling the default operator new).
Once the code generator is finished a single free_all_objects
call deletes all the AST objects in one go. The custom delete
operator is required so that we can still explicitly deallocate
vhdl_element objects before the code generator completes.

There are also some allocation statistics printed at the end
when -pdebug=1 is specified.
2009-01-18 16:42:10 -08:00
..
vhpi Move the VHDL support package 2008-07-07 15:36:13 +01:00
Makefile.in Move VHDL global state management to a single file 2009-01-17 09:19:58 -08:00
cast.cc Shadow reduction part 4 2008-10-30 21:46:44 -07:00
display.cc Shadow reduction part 4 2008-10-30 21:46:44 -07:00
expr.cc Move VHDL global state management to a single file 2009-01-17 09:19:58 -08:00
logic.cc Move VHDL global state management to a single file 2009-01-17 09:19:58 -08:00
lpm.cc Move VHDL global state management to a single file 2009-01-17 09:19:58 -08:00
process.cc Clean up VHDL debug messages 2009-01-17 09:19:58 -08:00
scope.cc Clean up VHDL debug messages 2009-01-17 09:19:58 -08:00
state.cc Improve memory management in VHDL target 2009-01-18 16:42:10 -08:00
state.hh Move VHDL global state management to a single file 2009-01-17 09:19:58 -08:00
stmt.cc Move VHDL global state management to a single file 2009-01-17 09:19:58 -08:00
support.cc Move VHDL global state management to a single file 2009-01-17 09:19:58 -08:00
support.hh Tidy up reduction functions in support.cc 2008-09-13 18:20:12 +01:00
vhdl-s.conf Cary R.'s additional system functions, real value error messages, etc. 2008-09-06 12:06:01 +01:00
vhdl.cc Move VHDL global state management to a single file 2009-01-17 09:19:58 -08:00
vhdl.conf Remove redundant back-end selections. 2008-09-07 16:43:54 -07:00
vhdl_config.h.in Makefile and autoconf changes to build VHDL code generator 2008-05-28 17:17:39 +01:00
vhdl_element.cc Improve memory management in VHDL target 2009-01-18 16:42:10 -08:00
vhdl_element.hh Improve memory management in VHDL target 2009-01-18 16:42:10 -08:00
vhdl_helper.hh Improve memory management in VHDL target 2009-01-18 16:42:10 -08:00
vhdl_syntax.cc Improve memory management in VHDL target 2009-01-18 16:42:10 -08:00
vhdl_syntax.hh Store only a single VHDL entity for each Verilog module 2009-01-17 09:19:57 -08:00
vhdl_target.h Move VHDL global state management to a single file 2009-01-17 09:19:58 -08:00
vhdl_type.cc Generate VHDL array type declarations of Verilog arrays 2008-07-17 13:08:55 +01:00
vhdl_type.hh Generate VHDL array type declarations of Verilog arrays 2008-07-17 13:08:55 +01:00