Stephen Williams
64936d07e5
Add %ix/getv instruction
...
The %ix/getv instruction loads an integer register directly from
a signal vector. This is an optimization that an index register
is loaded from an expression is only a signal. It avoids the thread
vector space.
2007-12-07 13:12:19 -08:00
Stephen Williams
8f519531f3
Optimize load-add with load/add instruction
...
Where and expression is an immediate value added to a signal value,
it is possible to optimize them to a single instruction that combines
the load with an add at the same time.
2007-12-04 19:15:15 -08:00
Stephen Williams
5d750b7779
Optomize runtime using immediate compare
...
Implement compare-immediate instructions and generate code to use
these new instructions to improve runtime performance.
Signed-off-by: Stephen Williams <steve@icarus.com>
2007-10-03 20:58:40 -07:00
steve
0a38499941
Properly handle signed conversion to real
2007-06-07 03:20:15 +00:00
steve
9931e4c013
Finish up part select of array words.
2007-04-14 04:43:01 +00:00
steve
4f74d9df98
Add the mov/wr opcode.
2007-02-14 05:58:14 +00:00
steve
91d84e7dc7
Major rework of array handling. Memories are replaced with the
...
more general concept of arrays. The NetMemory and NetEMemory
classes are removed from the ivl core program, and the IVL_LPM_RAM
lpm type is removed from the ivl_target API.
2007-01-16 05:44:14 +00:00
steve
26e2e85ffa
Handle non-constant delays on indexed non-blocking assignments.
2006-10-05 01:23:53 +00:00
steve
50800fd3a1
Add support for real valued modulus.
2006-08-09 05:19:08 +00:00
steve
d434dd7296
Allow part selects of memory words in l-values.
2006-02-02 02:43:57 +00:00
steve
2b8fd28a95
Force instruction that can be indexed.
2005-11-26 17:16:05 +00:00
steve
988a0a7048
Add the load/v.p instruction.
2005-09-17 04:01:01 +00:00
steve
65584e6dde
Add word integer compares.
2005-09-14 02:50:07 +00:00
steve
cd14ee77ae
Add the assign_v0_d instruction.
2005-06-14 01:44:09 +00:00
steve
42433f4df9
Add support for notif0/1 gates.
...
Make delay nodes support inertial delay.
Add the %force/link instruction.
2005-06-02 16:02:11 +00:00
steve
5277124c76
Implement non-blocking part assign.
2005-05-07 03:15:42 +00:00
steve
2894cdefc7
Add cassign/link instruction.
2005-05-01 22:05:21 +00:00
steve
85286cc086
Rearrange how memories are supported as vvp_vector4 arrays.
2005-03-03 04:33:10 +00:00
steve
26d97558c4
Replace single release with release/net and release/reg.
2004-12-17 04:47:47 +00:00
steve
78dda42493
Add the force/v instruction.
2004-12-15 17:17:42 +00:00
steve
65e9b6be12
Rework of internals to carry vectors through nexus instead
...
of single bits. Make the ivl, tgt-vvp and vvp initial changes
down this path.
2004-12-11 02:31:25 +00:00
steve
050ec6f325
Add signed modulus operator.
2004-06-19 15:52:53 +00:00
steve
a7ae8adf9b
Support delayed/non-blocking assignment to reals and others.
2004-05-19 03:26:24 +00:00
steve
dccd7ec7e2
Remove the vvp_cpoint_t indirect code pointer.
2003-07-03 20:03:36 +00:00
steve
71a404a546
Add arithmetic shift operators.
2003-06-18 03:55:18 +00:00
steve
96ca885aca
Remove short int restrictions from vvp opcodes.
2003-06-17 19:17:42 +00:00
steve
e157b3f9c5
Add the set/x0/x instruction.
2003-05-26 04:44:54 +00:00
steve
4ace97a083
ufunc calls to functions can have scheduling complexities.
2003-05-07 03:39:12 +00:00
steve
4b543de7f9
Add support for division of real operands.
2003-03-28 02:33:56 +00:00
steve
aa3297a925
Add the cvt/vr instruction.
2003-02-27 20:36:29 +00:00
steve
dd56d9a17c
Add the %sub/wr instruction.
2003-02-06 17:41:47 +00:00
steve
7de4108bad
Add %cvt/ir and %cvt/ri instructions, and support
...
real values passed as arguments to VPI tasks.
2003-01-26 18:16:22 +00:00
steve
9a5a00f836
Add thread word array, and add the instructions,
...
%add/wr, %cmp/wr, %load/wr, %mul/wr and %set/wr.
2003-01-25 23:48:05 +00:00
steve
03afbf157b
%set/x0 instruction to support bounds checking.
2002-11-21 22:43:13 +00:00
steve
1b84893ccb
Add the %assign/v0 instruction.
2002-11-08 04:59:57 +00:00
steve
d7ae85a13a
Add vector set and load instructions.
2002-11-07 02:32:39 +00:00
steve
3d3116d48b
Add support for binary NOR operator.
2002-09-18 04:29:55 +00:00
steve
dac99b9374
Add support for binary nand operator.
2002-09-12 15:49:43 +00:00
steve
cbca31555d
Add the %subi instruction, and use it where possible.
2002-08-28 18:38:07 +00:00
steve
1db8319bce
Add the %load/nx opcode to index vpi nets.
2002-08-28 17:15:06 +00:00
steve
985c34bfd9
Fix behavioral eval of x?a:b expressions.
2002-08-22 03:38:40 +00:00
steve
52bf4e613f
conditional ident string using autoconfig.
2002-08-12 01:34:58 +00:00
steve
5792220dcb
Remove the vpi object symbol table after compile.
2002-07-05 02:50:57 +00:00
steve
d68153dea3
Add %cmpi/u instruction.
2002-06-02 18:55:58 +00:00
steve
1ce50993f0
Add the %muli instruction.
2002-05-31 20:04:22 +00:00
steve
af6f0c800f
Slight improvement in %mov performance.
2002-05-31 04:09:58 +00:00
steve
b6b364a09d
Add %addi, which is faster to simulate.
2002-05-29 16:29:34 +00:00
steve
52ea13819a
Add the assign/d instruction for computed delays.
2002-04-21 22:29:49 +00:00
steve
eb27dc8db3
Support signed integer division.
2002-04-14 18:41:34 +00:00
steve
de252965ac
Add the .ufunc statement.
2002-03-18 00:19:34 +00:00