tgt-vvp/eval_expr.c uninitialized variables
vpi/sys_display.c uninitialized variables
vvp/vpi_priv.cc deprecated string constant usage
vvp/vpi_vthr_vector.cc deprecated string constant usage
the last entry invokes vpip_name_string() and uses const char *
in the same way as the other 9 callers in vvp/*.cc, the only
difference is that the argument is static instead of computed.
Rework the ivl_file_table_* interface to be more generic and easier
to use. Also all the vvp examples except for memory.vvp have been
fixed to run correctly with the current vvp. Someone with a bit more
experience will need to fix memory.vvp.
Add the vpiFile and vpiLineNo properties to system functions.
Most other objects have stubs that return "N/A"/0. Interactive
functions (called from the debugger) use <interactive> for the
file name.
With this change, local symbols are not emitted in the vvp target,
but are marked as local. When thus marked, the vvp run time does not
offfer any VPI access and the signals (net or var) are effectively
invisible.
Zero-based part selects are a special case that is handled with
optimized code. Properly handle the part select width to get the
desired padding.
Signed-off-by: Stephen Williams <steve@icarus.com>
When user defined function calls are withing a $signed, the result
needs to be properly padded. To make this work, handle padding of
a function result exactly type the padding of a signal vector. this
is natural in that the function return value *is* in a signal vector.
This fixes pr1841300.
When loading a part select from the least significant bits, it is
OK to use the %load/v instruction to strip the high bits off. This
allows the zero-based part select to work in one step, without
loading excess bits.
Some patch caused a variable that held the constant base of a part
select to become unassigned. This led to unexplained failures to part
select a signal. Fix by properly detecting the case of a constant base
of 0 for the part select.
The %ix/getv instruction loads an integer register directly from
a signal vector. This is an optimization that an index register
is loaded from an expression is only a signal. It avoids the thread
vector space.
Where and expression is an immediate value added to a signal value,
it is possible to optimize them to a single instruction that combines
the load with an add at the same time.
String values are known to be 2-value bits, so they are natural
candidates for using the movi instruction to load the value in
far fewer instructions. With this patch, up to 16bits (two bytes)
at a time can be loaded per instruction.
Signed-off-by: Stephen Williams <steve@icarus.com>
tgt-vvp was taking strings and processing them as is, but the strings
could contain octal constants. These constants needed to be converted
to binary form before they could be turned into a bit pattern.
CMOS gates like NMOS and PMOS have a strength aware output.
They were missed when the NMOS and PMOS were fixed. "cmos.v"
will now pass in the test suite.
This patch fixes/enhances the array part select code. It also
verifies that any lval array index in a continuous assignment
is a constant value. Also, %set/av now uses index register 1 as
described in the documentation (as a bit offset).
Modpaths need to be in the proper scope in order to be available to
vpi functions. The code generator manages that by writing the modpath
records with scope switch functions. Batch the modpath records at the
end of the structural stuff so that the scope switching doesn't cause
trouble.
Also seperate the modpath code into its own source file.
Signed-off-by: Stephen Williams <steve@icarus.com>
The << operator may not be defined when the RHS is greater than or
equal to the LHS width. To work around the problem the mask is
incrementally generated.
There have been reports in the field of number-to-real conversions
doing bad things with the calculated mantissa. This patch eliminates
a opssible portability problem by reworking the negating of negative
mantissa values.
Signed-off-by: Stephen Williams <steve@icarus.com>
Constant propagation incorrectly elided an entire constant net node
if only the LSB of the driven vector was HiZ. This caused the entire
vector to look like HiZ. Also, the code generator for writing the
constant values missed bits.
Signed-off-by: Stephen Williams <steve@icarus.com>
Implement compare-immediate instructions and generate code to use
these new instructions to improve runtime performance.
Signed-off-by: Stephen Williams <steve@icarus.com>
This patch adds ivl_scope_time_precision() to the compiler which can
be used to extract the local scope precision. tgt-stub and tgt-vvp
have been modified to use this new function and output a value that
is appropriate. The vvp runtime has been altered to use this new
data which is accessed with the vpip_time_precision_from_handle()
function. vpiTimePrecision uses this function to return the correct
precision.
The outputs to bufif and nmos/pmos devices are always strength-aware,
so should have their outputs connected to a net8 device.
Signed-off-by: Stephen Williams <steve@icarus.com>
Real value are vector width of 1, fix real literal to reflect this.
fix leaking real registers in code generation for function arguments.
Load of signal should handle conversion from real to vector. Function
arguments, type vector passed a real value, are an example where this
comes up.
Signed-off-by: Stephen Williams <steve@icarus.com>
Arrays of nets that have all their words collapsed together can become
a collapsed array as a whole. Add support for this case in the vvp code
generator and runtime.
Stephen Williams
Larry Doolittle
Cary R
steve