Maciej Suminski
9ff9cbf4aa
vhdlpp: Smarter determining the direction in for loops.
2014-10-10 18:39:14 +02:00
Maciej Suminski
44da7de651
vhdlpp: prange_t may have the direction determined automatically.
2014-10-08 10:26:37 +02:00
Maciej Suminski
fddb3ec129
vhdlpp: ForLoopStatement emits range boundaries expressions instead of evaluating them.
...
Unfortunately without evaluation it is not possible to warn against
degenerated loops, so it had to be removed.
2014-10-07 14:25:00 +02:00
Stephen Williams
164b5f9348
Fix SV emit of ForLoopStatement and ReturnStmt.
2013-06-12 14:09:07 -07:00
Arun Persaud
f5aafc32f9
updated FSF-address
2012-08-29 10:12:10 -07:00
Stephen Williams
d9acfe57b1
Put off array bound evaluation / describe entity generics as parameters
...
Entity generics are easily implemented as module parameters, so make
it so. Give the parameters their default values from the generic declaration.
Array bounds may use values that cannot be evaluated right away, so
put off their evaluation.
2011-10-15 17:41:48 -07:00
Stephen Williams
8003382b3e
Elaborate and emit case statements.
2011-10-01 11:45:28 -07:00
Stephen Williams
677a22d353
Generate code for vhdl for loops.
2011-09-18 15:51:31 -07:00
Stephen Williams
e6a9b5532a
Report some missed emit error count.
2011-08-21 16:40:06 -07:00
Stephen Williams
f5220c54f1
Handle variables in process statements
...
Parse variables declared in the declaration section of process
statements, and support variable assignment statements.
2011-08-17 20:19:15 -07:00
Cary R
72769146ee
Remove all the user code compilation warnings
...
Remove all the compilation warnings that are from user changeable code.
There are still some warnings related to the flex generated lexor code.
2011-07-30 09:37:14 -07:00
Cary R
de356b03c8
Fix most of the cppcheck warnings in the vhdlpp directory.
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Mostly using size() vs empty() in the STL and a missing initialization.
2011-07-30 09:35:12 -07:00
Pawel Szostek
60deb775ca
Add support for VHDL's loop statements
2011-07-12 19:20:04 -07:00
Pawel Szostek
ad31eaaea8
Add parser support for VHDL's procedure call
...
Parse procedure calls and put them into
abstract syntax tree. Elaboration and emission
still has to be done.
2011-07-08 18:10:30 -07:00
Stephen Williams
d14f60f28a
Elaborate and emit vhdl elsif sections.
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The IfStatement contains a list of elsif sections that need
to be elaborated/emitted in the middle of the true and false
clauses.
2011-06-22 18:13:40 -07:00
Stephen Williams
fc25ccde06
Basic emit of sequential code
...
Infrastructure for debug and emit of sequential statements in processes.
This does not properly handle the actual semantics of the behavioral
code, but it provides an infrastructure where we can handle all the
tricky elaboration to come.
2011-05-15 11:07:42 -07:00