4 Commits

Author	SHA1	Message	Date
steve	fef81958bc	Do not generate code for signals, ... instead use the NetESignal node to generate gate-like signal devices.	1999-02-08 03:55:55 +00:00
steve	4e2c0036aa	VVM support for small sequential UDP objects.	1998-12-17 23:54:58 +00:00
steve	7859de1e4e	Add support it vvm target for level-sensitive ... triggers (i.e. the Verilog wait). Fix display of $time is format strings.	1998-11-10 00:48:31 +00:00
steve	8705aa94c6	Add vvm library.	1998-11-09 23:44:10 +00:00