Commit Graph

43 Commits

Author SHA1 Message Date
Cary R 1d318c4393 Update cppcheck to not run posix and add some -U flags 2021-01-02 13:23:59 -08:00
Martin Whitaker 8e4cc8e887 Use GNU make pattern rules to handle multiple file output from bison.
With a pattern rule, the recipe will only be executed once, even when
the rule has multiple targets. Using this to handle the output from
bison is included as an example in the GNU make manual.

This fixes the makefiles so that bison-generated header files will be
regenerated if they are deleted.
2020-07-30 16:27:01 +01:00
Henner Zeller 5b699c1be7 Bison includes its generated header in *.cc. Generate with correct name.
The current bison (3.7) generates a *.cc file that includes the header
it generated. For parse.cc this would be parse.hh. Right now, we rename
this header to have a common name used in other files, but this results
in a compile error for the parse.cc file:

parse.cc:462:10: fatal error: parse.hh: No such file or directory
  462 | #include "parse.hh"
      |          ^~~~~~~~~~

Fix this by telling bison to output the header file to the correct
filename in the first place so that we don't have to rename it.
(using the --defines instead of -d option).

This looks like a bison specific option not available in Posix yacc;
but looks like we're requiring bison anyway.

Signed-off-by: Henner Zeller <h.zeller@acm.org>
2020-07-29 15:29:08 -07:00
Huang Rui 11001f58d5
Thoroughly fix parallel installation issues
In PR #300, @xdch47 pointed out a stable way to fix parallel
installation problems.

This fix applied the method, thanks!

Signed-off-by: Huang Rui <vowstar@gmail.com>
2020-02-12 22:42:04 +08:00
Huang Rui 0100c0bc5c [3/20]vhdlpp/Makefile.in:fix install timestamp check
Fix bug: https://bugs.gentoo.org/705412
Fix bug: https://github.com/gentoo/gentoo/pull/14096
Related: https://github.com/steveicarus/iverilog/pull/294

Signed-off-by: Huang Rui <vowstar@gmail.com>
2020-02-12 22:08:40 +08:00
Cary R ea4e41207c Update cppcheck standards that are checked 2019-09-30 22:14:15 -07:00
Martin Whitaker 5bb6c7f53a Fix makefile rules for header files generated by bison.
bison 3.4.1 writes the header file before the c++ file. Our makefile
rules make the header files depend on the c++ files, so we need to
fix the timestamps accordingly.
2019-06-02 18:50:18 +01:00
Maciej Suminski d39f692cfd vhdlpp: Refactored the way of handling standard types. 2015-06-24 23:53:32 +02:00
Maciej Suminski 169228ad0f vhdlpp: Refactored the way of handling standard VHDL library functions. 2015-06-24 23:53:31 +02:00
Cary R 2e8c4e3dbc Basic patch from github #44 2014-11-04 11:39:01 -08:00
Larry Doolittle e221a8ced9 Rearrange compiler warning flags
Before this patch, WARNING_FLAGS applied to both C and C++,
and WARNING_FLAGS_CXX applied to C++ only.
This patch adds a WARNING_FLAGS_CC that applies to C only.
That change should be generally useful; in particular the C
code is almost ready for -Wstrict-prototypes, which does not
apply to C++.

-Wextra (or -W) used to only apply to C++ via WARNING_FLAGS_CXX.
This patch moves it to WARNING_FLAGS, to apply to both C and C++.
Unfortunately, that triggers a ton of warnings.

For now, cover most of the new warnings up by adding
-Wno-unused -Wno-sign-compare -Wno-type-limits
to WARNING_FLAGS_CC.  In the long run, I want to change the C coding
style, and take off these disable-warning flags.  But those changes
can dribble in as separate commits; this patch is big enough already.

Actually fix a couple missing-field-initializers in libveriuser/veriusertfs.c.
2014-07-09 09:04:17 -07:00
Cary R 0611135758 Some more cppcheck cleanup/updates 2014-06-29 20:39:40 -07:00
Stephen Williams d630e4dfe9 Elaborate VHDL entity port types/expressions.
We need to elaborate expressions so that function calls in
expressions (i.e. ranges) get bound to their proper scope.
This binding is in turn used to emit package scopes. This
is particularly interesting for ports of entities.
2013-06-12 14:21:35 -07:00
Arun Persaud f5aafc32f9 updated FSF-address 2012-08-29 10:12:10 -07:00
Stephen Williams 63b7fe059d Reword concat to handle aggregate arguments.
When concatenation expressions have aggregate arguments, we need to
get the type of the result down to the aggregate expressions so that
it can know how to interpret the elements.
2012-05-22 17:31:26 -07:00
Cary R 9c99bce054 Update lex/yacc builds to be consistent and to support parallel builds
Not all the lex/yacc (flex/bison) targets were using a consistent syntax.
This patch fixes that and explicitly serializes the *.c/*.cc and *.h build.
Not doing this was causing problem when using make -j. The issue appears to
be that if two targets are specified for a rule (e.g. file.cc file.h: file.y)
make does not realize they are both built by the same call so the rule is
executed twice. Once for the .cc target and once for the .h target. This is
not a problem for a serial build. To work around this only use the .c/.cc
file in the main target and then make the .h file depend on the .c/.cc file
as a sub-target.
2012-01-04 18:21:40 -08:00
Cary R 8df745a281 Remove SV include file and vhdlpp with make uninstall 2011-12-14 18:39:27 -08:00
Stephen Williams eeeadea3ac Fix recently broken write of vhdl packages to work space. 2011-10-16 12:18:34 -07:00
Stephen Williams 30cfcbe2dc Rework elaborate/emit of types.
This rework is needed to reasonably handle new types, like enums.
2011-10-02 10:56:00 -07:00
Stephen Williams 38854822da Write package headers to a library file
Build up a work library by writing a VHDL representation of the
package header into a source file. This representation needs to
be accurate enough that later invocations of vhdlpp can read them
with the VHDL parser.
2011-07-19 19:19:27 -07:00
Stephen Williams a53082176d Arrange for ports used as l-values to be declared as "reg".
Entity output ports may be used as l-values in a process within
the bound architecture. Detect that case during elaboration and
adjust the signal declaration so that it works in the Verilog pass.
2011-05-15 16:17:51 -07:00
Stephen Williams fc25ccde06 Basic emit of sequential code
Infrastructure for debug and emit of sequential statements in processes.
This does not properly handle the actual semantics of the behavioral
code, but it provides an infrastructure where we can handle all the
tricky elaboration to come.
2011-05-15 11:07:42 -07:00
Stephen Williams 27b58a7f93 Reorganize architecture debug methods. 2011-05-15 08:57:19 -07:00
Stephen Williams 3e419dc854 Parse/decorate sequential statements.
Get to the point where our sample program parses completely, and
the sequential statements generate SequentialStmt objects and a
process object in the architecture.

Also add a few missing expression types.
2011-05-08 16:40:35 -07:00
Stephen Williams d4c5cfc584 Add packages and component declarations within those packages.
This creates the Package class to represent packages, and the
Scope class to represent scopes in general. The library functions
are worked up to support scanning scopes for declarations that are
imported by "use" clauses.
2011-04-13 18:30:00 -07:00
Stephen Williams 799864eabf Add more complete support for vhdl local signals.
These signals are declared in the architecture and are local to
the module. The Architecture already parsed and stored these signal
declarations, but this patch adds the ability to actually emit these
signals in the generated code.

In the process of doing this, I had to regularize the elaboration
and emit of VTypes, so that it can be used in multiple places, not
just in entity headers (for ports).

I also added support for bit selects of signals. This effected a couple
places in the parser, and expressions in general.
2011-03-27 12:01:58 -07:00
Stephen Williams 8580ceea4d Parse component declarations / parse signal declarations.
These go into the architecture/block of their scope and will be
used by component instantiations to make sure the bindings are
correct and complete.

Also handle signal declarations. The elaborator will use these
to generate module local variables that are used by the architecture.
2011-03-22 09:18:20 -07:00
Stephen Williams 9330b58a3a Merge branch 'master' into work4
Conflicts:
	vhdlpp/lexor.lex
	vhdlpp/parse.y
	vhdlpp/vhdlint.cc
2011-03-14 17:34:57 -07:00
Cary R 98f5ed2f85 Fix remaining space issues. 2011-03-14 16:26:31 -07:00
Stephen Williams bc5fe9676e Create the shell of a proper type system.
Rather then just relying on comparing type names all throughout
elaboration, create type description data structures and use them
during elaboration to handle proper types.
2011-02-13 16:54:56 -08:00
Stephen Williams 798ead9345 Code generator for architectures.
Separate elaboration from code generation in the Entity, and add
to Architectures a code generator to handle some simple cases. At
this point we have the basic structure for the VHDL compiler.
2011-02-13 16:48:52 -08:00
Stephen Williams 769159d053 Add parse decorations for expressions.
Elaboration will need a parse tree for expressions. Create one for
the expression types that are currently supported. Also add rules
and the keywords for all the remaining binary logical operators.
2011-02-13 16:47:05 -08:00
Stephen Williams 30d689016a Create an Architecture class and bind them to their entities. 2011-02-13 16:43:04 -08:00
Pawel Szostek 77a346ffb1 Added full number, based number (both int and float), string and character literals handling 2011-02-10 18:34:38 -08:00
Cary R 633ee85dc2 vhdlpp: update make clean and vpath, add cppcheck target
This patch updates the make clean target and modifies the vpath search to
match what is done in the main ivl Makefile since this one has the same
issues it does. It also adds a cppcheck target and removes the redundant
libmisc build target since the vpath already handles this.
2011-01-26 18:07:39 -08:00
Cary R a6c02f8cb9 Some vhdlpp git cleanup.
This patch adds vhdlpp/parse.output to .gitignore and moves all the
vhdlpp depend files to the local dep directory.
2011-01-26 18:07:27 -08:00
Cary R 6bf7e88611 Fix build of ivl with files in libmisc and vhdlpp check issues.
This patch fixes the ivl build to find files in libmisc using vpath instead
of a separate target. The existing constructs caused build problems after
running a make clean. It also adds an empty checking target to vhdlpp.
2011-01-24 13:34:47 -08:00
Jared Casper ffca523d39 Fix vhdlpp Makefile for out-of-tree builds.
The INCLUDE_PATH in the vhdlpp Makefile was not including $(srcdir)
and $(srcdir)/.. when building outside of the source tree.
2011-01-24 13:33:41 -08:00
Stephen Williams ab8f623cea Add file/line information to entities and ports
Include the compiler infrastructure to vhdlpp for collecting the
file and line information and attaching it to entities and ports.
Make the parser store the file name during parse.

Create a libmisc library where I can put source files that are
used by multiple programs within the source tree.
2011-01-18 17:03:51 -08:00
Stephen Williams 5a6d07ff9f Emit Verilog stubs for entities
The verilog includes the module declaration with correct ports
in the correct order. Get the port directions correct.
2011-01-18 17:03:51 -08:00
Stephen Williams 02820c9e34 Parse create entities with ports
Create entity objects from entity declarations in the source,
and populate them with ports.
2011-01-18 17:03:51 -08:00
Stephen Williams 05122d3e2c Add VHDLPP support to ivlpp program
The ivlpp program is a good place to detect that the source file
is VHDL, and pass the source file to the vhdlpp program. Do so
automatically.
2011-01-18 17:03:51 -08:00
Stephen Williams 8cf1fd1820 Introduce shell of vhdlpp program.
Create the makefiles and configuration scripts to hold together
the vhdlpp front-end program. Create a shell main.
2011-01-18 17:03:51 -08:00