Commit Graph

6240 Commits

Author SHA1 Message Date
Stephen Williams 13958cf374 Elaborate_sig skips ports that are missing on primitives
It is illegal for primitives to not have ports bound, but that
error will be taken care of later, during elaborate.
2008-03-28 21:34:18 -05:00
Cary R b5b5a9935c Fix malloc/free and new/delete problems, plus some initializations.
This patch fixes some allocation problems (mostly in the parser
and lexor relating to identifiers). It also fixes a couple places
where uninitialized variables were used. All found with valgrind.
There are still 100 tests that have problems. Many of these appear
to be related.
2008-03-27 20:58:16 -07:00
Cary R bb14ac1fe0 Add functionality to alias an individual word of an array.
This patch adds the functionality to alias an individual word
of an array.
2008-03-26 21:44:57 -07:00
Cary R 04e8623ed6 Make macro argument substitution more sane.
Macro argument substitution used to just use strstr() to
find an argument that needed to be substituted. This is too
aggressive. It would do argument substitution in the middle
of keywords and other identifiers. A new routine is used
that verifies the character preceding the match is not
a normal identifier character [a-zA-Z0-9_$].
2008-03-26 18:27:05 -07:00
Cary R 225fcf6bf0 Pad CA bit arguments and make reductions and ! self-determined.
Binary bit based operators were not padding arguments if they had
different widths. The reduction operators and ! were not correctly
evaluating their arguments in a self-determined context.
2008-03-26 18:23:19 -07:00
Cary R 8c1cca423d Check for a negative repeat value.
This patch adds checks for a negative repeat value and prints
an error message under this condition.
2008-03-26 18:12:38 -07:00
Cary R 7bc9742710 Pad the R-value of a for loop initial assign like other assigns.
The for loop initial value R-value was not being padded correctly.
This code is a copy of the code used in a regular assignment.
2008-03-26 18:09:03 -07:00
Cary R 12f8af645f Add support for real parameters in vvp.
vvp did not have the ability to handle real parameters.
This patch fixes that omission. Parameters are only used
by vpi calls to get compile time information.
2008-03-26 18:04:57 -07:00
Cary R 259e4294e3 Make of_ZOMBIE use scheduled thread deletion.
This patch modifies of_ZOMBIE() to use the same scheduled deletion
as vthread_reap().
2008-03-26 18:02:43 -07:00
Stephen Williams ea74eb771e Fix a couple problems with signed multiply
Problems with signed expressions that are set to parameters and
that include multipliciation exposed a few bugs in the calculation
of signed multiply. Fix this and add some improved diagnostics.
2008-03-25 21:35:08 -07:00
Stephen Williams 32b115d8fe Parameters get their types (signedness) from expressions.
Parameters get their signedness from the expression that is assigned
to them unless the type is explicitly expressed where the parameter
is declared.
2008-03-25 21:30:41 -07:00
Stephen Williams 14e3a886bd Find implicit nets in expressions passed to ports.
It is questionable, but probably legal, for expressions passed as
arguments to input ports of various kinds of gates to implicitly
declare nets. This patch allows the scan through different types
of expressions for implicit nets.

The elaborate_sig handling here does not test for the legality of
having a non-trivial expression as argument to a port. For example,
it is definitely NOT legal to have r-value expressions passed to
output or inout ports. But that will be checked for later when the
instance is elaborated for real.
2008-03-23 17:52:48 -07:00
Stephen Williams 140fd45460 Implicit declaration handling in ports to UDP.
Scan port expressions for implicit nets using elaborate_sig.
2008-03-20 21:44:35 -07:00
Cary R 5b2f249dcc Thread deletion is now scheduled after rosync.
Threads used to be deleted when they finished processing code.
The problem with this is that some of the code could be
rescheduled to run at rosync ($strobe, etc.). This allowed the
thread data the code depended on to be reaped too soon. This
patch uses a new queue to schedule thread deletion. The queue
is processed after rosync has finished.
2008-03-20 20:45:41 -07:00
Cary R 01eb298228 Make muxz and muxr functors use scheduled events.
This patch makes the muxz and muxr functors schedule events
instead of directly calling vvp_send_*(). This prevents the
code from going into an infinite loop when the output feeds
back to the select.
2008-03-20 20:26:45 -07:00
Cary R 48990d8e2d Implement CA - ternary short circuit for constant T/F expressions.
This patch only applies to the ternary operator when used in a
continuous assignment. It adds short circuiting when the expression
is a constant true or false. It does not optimize the special case of
a constant 'bx expression with constant T/F expressions.
2008-03-20 20:07:54 -07:00
Cary R 77722a62c2 Enhance dump() for function definitions.
This patch enhances dump() for function definitions, by indicating a
signed result with a prepended "+" and also printing the MSB and LSB.
This matches other dump() routines. It also prints the arguments with
the same information. The arguments also include their type "input",
"output" or "inout".
2008-03-20 19:42:11 -07:00
Stephen Williams a2ea980a7a Merge branch 'implicit-sig' 2008-03-18 21:44:34 -07:00
Cary R 86301be3d2 Remove unused return_event_flag.
This patch removes the unused return_event_flag variable.
2008-03-18 21:44:13 -07:00
Stephen Williams bbb488f730 Handle implicit nets in the named arguments of module instances. 2008-03-18 21:40:31 -07:00
Stephen Williams 13d4a7352c Elaborate implicit signals that are arguments to module instances.
Module instances are like gates, so the expressions pass in need
to be checked for implicit nets.
2008-03-18 21:25:13 -07:00
Stephen Williams d26ae866f8 Move implicit net creation from elaboration to elaborate_sig
If implicit nets are declared during elaboration, then the success
of binding during elaboration will depend on the order of the code
in the source file.
2008-03-18 20:50:40 -07:00
Stephen Williams 8e6c2652ab Merge branch 'master' of steve-icarus@icarus.com:git/verilog 2008-03-14 21:06:27 -07:00
Stephen Williams 94818c19a0 Update to 20080314 snapshot 2008-03-14 15:58:51 -07:00
Stephen Williams 9b1baea6da Minor remove of unused vvp_net_t member. 2008-03-12 21:30:42 -07:00
Cary R ef9ee52e53 NetESignal::dup_expr() was not passing the word_ information.
The dup_expr() function for NetESignal was not copying the word_
expression. This would cause an individual array access to turn
into an entire array access. The file and line information was
also not being set correctly.

An assert() in tgt-vvp/eval_expr.c was also replaced with an
exit() since the appropriate information was already being
printed.
2008-03-12 20:55:12 -07:00
Cary R 377f5eaa23 Add \' as a string constant to block macro expansion.
This patch allows you to type "The \`define is `value" and not have
Icarus try to expand `define as a macro.
2008-03-11 20:14:32 -07:00
Cary R 234648231b Add bit/part select release for constants and add an error check.
This patch adds functionality to do a bit or part select release
when a constant value is forced to the net/register. It also adds an
error message when the user tries to force a signal to a bit/part
select. This is not currently handled by the run time, so is now
caught in the compiler (tgt-vvp). Where when this functionality is
needed, it will be easy to know what to do instead of trying to track
down some odd runtime functionality.

What this all means is that you can force a signal to an entire
signal or you can force a constant to any part of a signal (bit,
part or entire) and release any of the above. Technically the
release of a constant value does not have to match the force.
The runtime verifies that if you are releasing a signal driver
it is being done as a full release. I don't see an easy way to
check this in the compiler.

To fix the signal deficiencies we need to rework the force_link
code to allow multiple drivers and partial unlinking. Much of
this is in the runtime, but the %force/link operator may also
need to be changed like I did to the %release opcode.
2008-03-11 19:56:58 -07:00
Cary R cc28a9a734 Improve error message in tgt-vvp/eval_expr.c:draw_eval_expr_wid().
The IVL_EX_NONE type was not displaying any message and default did not
use the new ivl_expr_{file,lineno} functions to get the source location.
This patch remedies these problems.
2008-03-11 19:47:22 -07:00
Stephen Williams 6f1445ff9d Minor cleanup of vpi_put_value to wire
Comments to clarify the vpiForceFlag and vpiReleaseFlag behaviors.
2008-03-10 22:18:41 -07:00
Stephen Williams e0fbc15bd4 Support vpiForceFlag and vpiReleaseFlag for nets.
vpi_put_value can mimic force and release with vpiForceFlag and
vpiReleaseFlag flags to the vpi_put_value call. With this patch,
the infrastructure is added to allow the flags argument to be passed
to the dispatched put_value function, and for signals handle those
flags as force/release of a net.
2008-03-10 21:54:58 -07:00
Stephen Williams e141d2bb37 Merge branch 'master' of ssh://steve-icarus@icarus.com/home/u/icarus/steve/git/verilog 2008-03-10 19:24:40 -07:00
Cary R fe72d02cf6 Major rework of the ternary operator elaboration code.
This patch reworks much of the ternary code to short circuit when
possible and supports real values better. It adds a blend operator
for real values that returns 0.0 when the values differ and the value
when they match. This deviates slightly from the standard which
specifies that the value for reals is always 0.0 when the conditional
is 'bx. There are also a couple bug fixes.

These fixes have not been ported to continuous assignments yet.
Ternary operators used at compile time and in procedural assignments
should be complete (short circuit and support real values).
2008-03-08 19:45:13 -08:00
Cary R c2bae1ad6c Fix a small bug in the extra digits warning.
There were a couple places where a normal decimal number was
accidentally setting the base for an unsized number. This is
only a warning problem.
2008-03-06 20:42:07 -08:00
Stephen Williams 692caca9dc Connect module instance arrays MSB to MSB.
When a bit port of a module instance is connected to a vector
argument, the MSB module instance should be connected to the MSB
of the vector argument. This matters only in the rare case that
the %m is used. It also makes wave dumps come out right.
2008-03-06 20:37:08 -08:00
Michael Witten 8b45797ccf ivlpp: Fixed handling of absolute paths
The updates to the do_include code destroyed the
handling of absolute paths; all of the code that
handles buffer-switching was erroneously placed
in just the relative-path branch. Thanks go to
Cary R. for pointing out the problem.

Now the common code has been extracted yet again,
and the notorious goto statement has been used
in favor redundancy.

The test vvp_reg.pl produces the same output as
before, so hopefully nothing new is broken.

Signed-off-by: Michael Witten <mfwitten@mit.edu>
2008-03-05 08:42:57 -08:00
Stephen Williams 8d3febff2b Keep processes in proper lexical scope
Normally processes are found in the lexical scope of a module, but
there are special cases where processes (other then task/function
definitions) are in other lexical scopes. The most likely case is
initilizations that are in the lexical scope where the assigned
variable is declared.

In the process, the behaviors list is kept in the base PScope class
instead of the Module or any other derived lexical scope class.
2008-03-03 20:49:52 -08:00
Cary R 3221f70bcb Add vvp_fun_part_var::recv_vec4_pv().
Add missing vvp_fun_part_var::recv_vec4_pv() function. This is mostly
a duplicate of the _pv() routine from vvp_fun_part.
2008-03-02 21:20:56 -08:00
Stephen Williams cb920bd864 Merge branch 'master' of steve-icarus@icarus.com:git/verilog 2008-03-02 21:04:46 -08:00
Stephen Williams 32a2e7aa39 Fix lexical scopes within case-generate alternatives.
Case-generate alternatives create sub-scopes that need to be scanned
by the scope scanner in order to get function definitions etc. that
are defined lexically within generated scopes.
2008-03-02 21:04:04 -08:00
Stephen Williams 52ac96ca15 elaborate_sig for generated case items
Handle elaborate_sig for scopes that are within a case-generated
scheme.
2008-02-27 20:54:47 -08:00
Cary R f8caebd076 Convert real array index to integer.
This patch converts a constant real index to an integer value when
defining an array. This can happen when using 2**8 which returns a
real value since the operands are signed.
2008-02-27 18:00:21 -08:00
Cary R 70c5c9fe14 Propagate file and line information in more places.
There where a few places that were not propagating the file and
line information.
2008-02-27 17:31:20 -08:00
Stephen Williams 75df8fb6bb Remove index register restrictions on ix/arith instructions.
The %ix/<arith> instructions are currently not in use, but even so
it is just plain wrong to restrict their register argument to 0-3.
2008-02-27 17:01:53 -08:00
Cary R ec87c7f6de Fix %ix/load to work with all index registers.
draw_number_bool64() in tgt-vvp/eval_bool.c was using %ix/load to
load immediate values into registers greater than three. The problem
was that of_IX_LOAD() in vvp/vthread.cc was masking off the upper
bits. This was putting the results in the wrong register. This patch
removes the bit masking from of_IX_LOAD() and updates the %ix/load
documentation.
2008-02-27 16:54:38 -08:00
Cary R b5ef6d7a37 Fix some problems in driver-vpi/main.c
Fixed a few problems in driver-vpi/main.c that were preventing
the Verilog-A math library from compiling.
2008-02-25 16:01:59 -08:00
Cary R 285ff2859f Add power operator synthesize().
This patch adds synthesize() for the power operator.
2008-02-25 15:57:56 -08:00
Michael Witten a01bc5e245 ivlpp: Cleanup: Formatting/Detabification
The file lexor.lex was beginning to suffer a catastrophic
increase in entropy due mainly to the mingling of spaces
and tabs--an age-old problem that often finds itself as
the subject of many a religious war.

The key rule: Make it consistent in as many editors as
possible; this was achieved by converting all hard tabs
into soft tabs (composed of spaces) of width 4.

I couldn't help but make modifications to the code as I
tabifified, but most of the changes are strictly style.

While maintainers generally treat large scale whitespace and
formatting changes with much caution, I believe that the code
is now much more maintainable; moreover, the test suite
produces the same results as before.

Signed-off-by: Michael Witten <mfwitten@mit.edu>
2008-02-25 15:52:41 -08:00
Michael Witten c6ce3f6f38 ivlpp: Error checking for macro names
Macro names cannot be compiler directive names.
Such trespasses are now recognized and reported:

    (1) Offending `define lines are skipped.

    (2) Offending macros meant to be expanded
        are replaced with nothing.

Signed-off-by: Michael Witten <mfwitten@mit.edu>
2008-02-25 15:51:34 -08:00
Cary R fac1cc5a1c Add user function synth and clean up expression code.
This patch adds synthesize() for user functions. It also cleans up a
number of inconsistencies and missing checks in the expression code.
2008-02-24 20:00:18 -08:00