steve
|
36d36d99f3
|
Generate BUF devices for bufz logic.
|
2001-10-11 00:12:28 +00:00 |
|
steve
|
606eb2b3cd
|
Support the cellref attribute.
|
2001-09-16 22:26:47 +00:00 |
|
steve
|
cefbb635c1
|
Suppor the PAD attribute on signals.
|
2001-09-16 01:48:16 +00:00 |
|
steve
|
b2b8b89cd8
|
Make configure detect malloc.h
|
2001-09-15 18:27:04 +00:00 |
|
steve
|
92760f2c5f
|
Support != in virtex code generator.
|
2001-09-15 05:06:04 +00:00 |
|
steve
|
9fda809fa6
|
Add XOR and XNOR gates.
|
2001-09-14 04:17:20 +00:00 |
|
steve
|
5976e7078c
|
Xilinx uses GROUND and VCC as pin names for the
GND and VCC devices.
Connect the top end of the EQ chain to the MUXCY
instead of to the LUT. The MUXCY has the real output.
|
2001-09-12 04:35:25 +00:00 |
|
steve
|
da9a84ed84
|
Use carry mux to implement wide identity compare,
Place property item in correct place in LUT cell list.
|
2001-09-11 05:52:31 +00:00 |
|
steve
|
167f94bdbf
|
Add 4 wide identity compare.
|
2001-09-10 03:48:34 +00:00 |
|
steve
|
4507351d48
|
Virtex support for mux devices and adders
with carry chains. Also, make Virtex specific
implementations of primitive logic.
|
2001-09-09 22:23:28 +00:00 |
|
steve
|
acde444439
|
Separate the virtex and generic-edif code generators.
|
2001-09-06 04:28:39 +00:00 |