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7821 Commits

Author SHA1 Message Date
Maciej Suminski 5509b3c7a5 vhdlpp: Enums are based on integer type. 
This way than can be used as output ports.
 2015-06-24 23:53:33 +02:00
Maciej Suminski 49253c43ba vhdlpp: Do not emit reg/wire prefix for enums. 2015-06-24 23:53:33 +02:00
Maciej Suminski 311ffb27f2 ivl: Enum output ports are implicit regs when based on 'logic' type. 2015-06-24 23:53:33 +02:00
Maciej Suminski f0fd73e146 ivl: Array querying functions ($left, $low, etc.) for localparams. 2015-06-24 23:53:33 +02:00
Maciej Suminski 5858e1bbac vhdlpp: ExpName::probe_type() checks Subprogram parameters. 2015-06-24 23:53:33 +02:00
Maciej Suminski 95044d9ac7 vhdlpp: VType::type_match() checks definitions provided by VTypeDef. 2015-06-24 23:53:33 +02:00
Maciej Suminski c6f934964f vhdlpp: NOT is translated to either ~(...) or !(...) depending on the argument type. 2015-06-24 23:53:32 +02:00
Maciej Suminski 6f867d6f01 vhdlpp: Changed 'char' to 'byte'. 2015-06-24 23:53:32 +02:00
Maciej Suminski e6b57910a4 vhdlpp: ScopeBase::is_enum_name checks enums from standard libraries. 2015-06-24 23:53:32 +02:00
Maciej Suminski cc9b182eb6 vhdlpp: Procedure calls. 2015-06-24 23:53:32 +02:00
Maciej Suminski d39f692cfd vhdlpp: Refactored the way of handling standard types. 2015-06-24 23:53:32 +02:00
Maciej Suminski b666b9c0bf vhdlpp: Fixed a few memory leaks. 2015-06-24 23:53:32 +02:00
Maciej Suminski b3c1fa3e85 vhdlpp: Elaborate prefix & indices for ExpName. 2015-06-24 23:53:32 +02:00
Maciej Suminski 169228ad0f vhdlpp: Refactored the way of handling standard VHDL library functions. 2015-06-24 23:53:31 +02:00
Maciej Suminski 356a09d295 vhdlpp: VTypeArray::evaluate_ranges uses range boundaries to determine the direction. 2015-06-24 23:53:31 +02:00
Maciej Suminski 47c5ce0ab6 vhdlpp: Subprogram split to SubprogramHeader and SubprogramBody. 2015-06-24 23:53:31 +02:00
Maciej Suminski 3c437874e2 vhdlpp: Allow initializers for variables. 2015-06-24 23:53:31 +02:00
Maciej Suminski c28000c55f vhdlpp: Support for selected assignments. 2015-06-24 23:53:31 +02:00
Maciej Suminski 5a0d967682 vhdlpp: More renaming in ExpConditional. 2015-06-24 23:53:31 +02:00
Maciej Suminski 49efe6573c vhdlpp: Minor ExpConditional refactoring. 
Merged cond_ and true_clause_ to else_clause_ list to make
code more generic.
 2015-06-24 23:53:31 +02:00
Maciej Suminski ea12c0fe23 vhdlp: Renamed ExpConditional::else_t to ExpConditional::option_t. 2015-06-24 23:53:31 +02:00
Martin Whitaker 44dfc41004 Detect and report excess function arguments. 
Also enhance a couple of error messages.
 2015-06-21 09:07:11 +01:00
Martin Whitaker bdd0657140 Reject default task/function arguments when parsing traditional Verilog. 2015-06-21 09:05:39 +01:00
Martin Whitaker 1d279798d8 Fix for br982 - detect and report missing output arguments in task calls. 2015-06-20 22:39:55 +01:00
Martin Whitaker 0e66e9781a Add support for non-constant default subroutine arguments. 
Input ports only at the moment. Output "sorry" message for other
port types.
 2015-06-20 21:39:45 +01:00
Larry Doolittle b23faff27c Just a few more spelling fixes 
Includes some user-visible messages
 2015-06-17 08:09:34 -07:00
Martin Whitaker b242663cae Support negedge flip-flops in synthesis and in vvp. 
Also extend the support for FF asynchronous set values to vvp and
fix the dff functor in vvp to correctly model asynchronous set/clr
behaviour.
 2015-06-13 16:47:57 +01:00
Martin Whitaker d39c284055 Observe and propagate failures when synthesising lval concatenations. 2015-06-13 16:47:57 +01:00
Stephen Williams 6a73de0c43 Merge pull request #70 from orsonmmz/time 
Time expressions for vhdlpp
 2015-06-08 16:17:40 -07:00
Martin Whitaker e0cdd71984 Minor cleanup and simplification of aset_value changes. 2015-06-08 21:20:49 +01:00
Johann Klammer 81e1735959 establish support for aset_value and reorder clauses so vlog95 doesn't fail anymore. 2015-06-08 20:34:50 +01:00
Johann Klammer 3fb65eb51a single bit reset 2015-06-08 20:34:43 +01:00
Martin Whitaker 3080f5730d Better implementation of assignment lval concatenation synthesis. 2015-06-08 20:27:38 +01:00
Maciej Suminski 29ddd5208f vhdlpp: 'wait on' and 'wait until' statements. 2015-06-08 18:42:52 +02:00
Maciej Suminski 4a31f36646 vhdlpp: Minor code cleaning. 2015-06-08 18:42:52 +02:00
Maciej Suminski 1f1d47887e vhdlpp: Visitor for Expression class. 2015-06-08 18:42:52 +02:00
Maciej Suminski 80403d2ade ivl: Disabled reg_flag for time type in SV. 2015-06-08 18:42:52 +02:00
Maciej Suminski cd3180d1c2 ivl: TIME_LITERAL added as a primary expression. 2015-06-08 18:42:52 +02:00
Maciej Suminski 68f8007fc4 vhdlpp: 'wait for' statement. 2015-06-08 18:42:52 +02:00
Maciej Suminski d6ff1946f9 vhdlpp: Support for time expressions. 2015-06-08 18:42:52 +02:00
Martin Whitaker 4068c172f4 Fix overzealous detection of duplicate net/variable declarations. 
As reported by Larry Doolittle on iverilog-devel.
 2015-06-07 08:48:33 +01:00
Stephen Williams 9ac9f1c9f2 Merge branch 'master' of github.com:steveicarus/iverilog 2015-06-04 15:11:29 -07:00
Larry Doolittle 2739f83702 Spelling fixes in C and C++ comments 2015-06-04 15:00:29 -07:00
Cary R 7af3280215 Update cppcheck suppression file in VPI 2015-06-04 09:50:08 -07:00
Stephen Williams 05d591ccd6 Fix broken write to log files. 2015-06-03 14:32:04 -07:00
Stephen Williams fbedf4ae22 Snapshot 2015-06-03 2015-06-03 11:16:07 -07:00
Stephen Williams e6c6f6c81e Use fwrite to write $display output, instead of fprintf 
This change makes it safe to write non-ascii characters, which
is an issue when the %u format is used.
 2015-06-03 10:00:35 -07:00
Larry Doolittle 33c651aa00 Spelling fixes in .txt files 2015-05-25 12:52:03 -07:00
Stephen Williams 358bb4d5d9 Merge branch 'master' of github.com:steveicarus/iverilog 2015-05-25 12:51:20 -07:00
Martin Whitaker d5b41853fd Fix for br979 part 2 - handle blank lines in macro definition continuation. 2015-05-22 18:44:25 +01:00