ivl: Enum output ports are implicit regs when based on 'logic' type.
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parse.y
3
parse.y
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@ -4169,6 +4169,9 @@ port_declaration
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use_type = NetNet::IMPLICIT_REG;
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} else if (dynamic_cast<struct_type_t*> ($4)) {
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use_type = NetNet::IMPLICIT_REG;
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} else if (enum_type_t*etype = dynamic_cast<enum_type_t*> ($4)) {
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if(etype->base_type == IVL_VT_LOGIC)
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use_type = NetNet::IMPLICIT_REG;
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}
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}
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ptmp = pform_module_port_reference(name, @2.text, @2.first_line);
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