074a6a44e3
Detect and report arrays without index in net contexts.
2007-02-01 03:14:33 +00:00
91d84e7dc7
Major rework of array handling. Memories are replaced with the
...
more general concept of arrays. The NetMemory and NetEMemory
classes are removed from the ivl core program, and the IVL_LPM_RAM
lpm type is removed from the ivl_target API.
2007-01-16 05:44:14 +00:00
2302693201
Expression widths with unsized literals are pseudo-infinite width.
2006-10-30 05:44:49 +00:00
69cd007a71
Support real valued specify delays, properly scaled.
2006-10-03 05:06:00 +00:00
b658a3b41f
Missing PSpec.cc file.
2006-09-26 19:48:40 +00:00
0edb5a7547
Basic support for specify timing.
2006-09-23 04:57:19 +00:00
49b65e86fe
Add support for power in constant expressions.
2006-07-31 03:50:17 +00:00
80f30be9d0
Add support for system functions in continuous assignments.
2006-06-18 04:15:50 +00:00
f001d0001a
Add support for generate loops w/ wires and gates.
2006-04-10 00:37:42 +00:00
d434dd7296
Allow part selects of memory words in l-values.
2006-02-02 02:43:57 +00:00
dac11c2468
Handle synthesis of fully packed case statements.
2005-08-27 04:32:08 +00:00
b9799cf6ec
Remove NetVariable and ivl_variable_t structures.
2005-07-11 16:56:50 +00:00
75ad90534b
Generalize signals to carry types.
2005-07-07 16:22:49 +00:00
739a1839ed
Do sign extension of structuran nets.
2005-05-24 01:44:27 +00:00
7796c8bcfb
Parameters cannot have their width changed.
2005-05-17 20:56:55 +00:00
a1d899112a
Include delay expressions for assignments in dump.
2005-05-07 03:13:30 +00:00
1c5b4881d7
Handle case inequality in netlists.
2005-03-09 05:52:03 +00:00
ee5bb5fcaf
Add the NetRepeat node, and code generator support.
2005-02-08 00:12:36 +00:00
97f83ffbe3
laborate reduction gates into LPM_RED_ nodes.
2005-02-03 04:56:20 +00:00
dfb7c7ba6f
Remove the NetEBitSel and combine all bit/part select
...
behavior into the NetESelect node and IVL_EX_SELECT
ivl_target expression type.
2005-01-24 05:28:30 +00:00
25de448d34
Remove obsolete NetSubnet class.
2005-01-22 18:16:00 +00:00
9e94afe399
Use PartSelect/PV and VP to handle part selects through ports.
2005-01-09 20:16:00 +00:00
8f2d679c8a
Unify elaboration of l-values for all proceedural assignments,
...
including assing, cassign and force.
Generate NetConcat devices for gate outputs that feed into a
vector results. Use this to hande gate arrays. Also let gate
arrays handle vectors of gates when the outputs allow for it.
2004-12-29 23:55:43 +00:00
65e9b6be12
Rework of internals to carry vectors through nexus instead
...
of single bits. Make the ivl, tgt-vvp and vvp initial changes
down this path.
2004-12-11 02:31:25 +00:00
e4ae832153
Clean up spurious trailing white space.
2004-10-04 01:10:51 +00:00
5472b27e1f
Rewire/generalize parsing an elaboration of
...
function return values to allow for better
speed and more type support.
2004-05-31 23:34:36 +00:00
1295058e5d
parameter keys are per_strings.
2004-02-20 06:22:56 +00:00
27af95d402
Use perm_strings for named langiage items.
2004-02-18 17:11:54 +00:00
57c3e86084
Debug dumps for synth2.
2003-12-17 16:52:39 +00:00
bfe31e22bf
Start handling pad of expressions in code generators.
2003-07-26 03:34:42 +00:00
77da147629
Fix some enumeration warnings.
2003-07-05 20:42:08 +00:00
ccf4d4d7da
Module attributes from the parser
...
through to elaborated form.
2003-06-20 00:53:19 +00:00
71a404a546
Add arithmetic shift operators.
2003-06-18 03:55:18 +00:00
5903f0744c
Support parameters in real expressions and
...
as real expressions, and fix multiply and
divide with real results.
2003-05-30 02:55:32 +00:00
f1cc9d865b
Support event names as expressions elements.
2003-04-22 04:48:29 +00:00
1222153cdf
Keep parameter constants for the ivl_target API.
2003-03-10 23:40:53 +00:00
8f0c02c0fa
Spelling fixes.
2003-01-27 05:09:17 +00:00
46253ed873
Rework expression parsing and elaboration to
...
accommodate real/realtime values and expressions.
2003-01-26 21:15:58 +00:00
9ce2806710
Fix synth2 handling of aset/aclr signals where
...
flip-flops are split by begin-end blocks.
2002-10-23 01:45:24 +00:00
43501809b1
Redo the parameter vector support to allow
...
parameter names in range expressions.
2002-10-19 22:59:49 +00:00
8ab2ec6f86
Allow release to handle removal of target net.
2002-08-19 00:06:11 +00:00
d4eaede435
Do not elide named blocks.
2002-08-13 05:35:00 +00:00
52bf4e613f
conditional ident string using autoconfig.
2002-08-12 01:34:58 +00:00
89314d4772
Do not use hierarchical names of memories to
...
generate vvp labels. -tdll target does not
used hierarchical name string to look up the
memory objects in the design.
2002-08-04 18:28:14 +00:00
cd94019733
Remove NetTmp and add NetSubnet class.
2002-06-19 04:20:03 +00:00
a82c178fd9
Fix expression width for repeat concatenations.
2002-06-14 21:38:41 +00:00
9cef973d9b
Add NetRamDq synthsesis from memory l-values.
2002-06-08 23:42:46 +00:00
53d8cdd9f8
Add support for memory words in l-value of
...
non-blocking assignments, and remove the special
NetAssignMem_ and NetAssignMemNB classes.
2002-06-05 03:44:25 +00:00
91a755d0e8
Add support for memory words in l-value of
...
blocking assignments, and remove the special
NetAssignMem class.
2002-06-04 05:38:43 +00:00
bfad382fd1
Carry Verilog 2001 attributes with processes,
...
all the way through to the ivl_target API.
Divide signal reference counts between rval
and lval references.
2002-05-26 01:39:02 +00:00
steve