0edb5a7547
Basic support for specify timing.
2006-09-23 04:57:19 +00:00
fc0695beb6
Handle 64bit delay constants.
2006-08-08 05:11:37 +00:00
f001d0001a
Add support for generate loops w/ wires and gates.
2006-04-10 00:37:42 +00:00
77a0d7f4db
task/function ports can have types.
2006-03-30 05:22:34 +00:00
b9799cf6ec
Remove NetVariable and ivl_variable_t structures.
2005-07-11 16:56:50 +00:00
75ad90534b
Generalize signals to carry types.
2005-07-07 16:22:49 +00:00
d548c9a5f8
Handle synthesis of concatenation expressions.
2005-05-06 00:25:13 +00:00
65e9b6be12
Rework of internals to carry vectors through nexus instead
...
of single bits. Make the ivl, tgt-vvp and vvp initial changes
down this path.
2004-12-11 02:31:25 +00:00
e4ae832153
Clean up spurious trailing white space.
2004-10-04 01:10:51 +00:00
95c8115fc7
Add support for localparam ranges.
2004-08-26 04:02:03 +00:00
9949040285
Add support for the default_nettype directive.
2004-06-13 04:56:53 +00:00
5472b27e1f
Rewire/generalize parsing an elaboration of
...
function return values to allow for better
speed and more type support.
2004-05-31 23:34:36 +00:00
e7fa56981a
More identifier lists use perm_strings.
2004-05-25 19:21:06 +00:00
413932e406
Verilog2001 new style port declartions for primitives.
2004-03-08 00:10:29 +00:00
177b6ffb6a
Addtrbute keys are perm_strings.
2004-02-20 18:53:33 +00:00
1295058e5d
parameter keys are per_strings.
2004-02-20 06:22:56 +00:00
536068bdfb
Memory and Event names use perm_string.
2004-02-19 06:57:10 +00:00
27af95d402
Use perm_strings for named langiage items.
2004-02-18 17:11:54 +00:00
4288f3c6d0
Better error checking of primitive tables.
2004-02-15 17:48:28 +00:00
5b351599f0
Allow attributes on Verilog 2001 port declarations.
2003-07-04 03:57:18 +00:00
21ff80075a
Various warnings fixed.
2003-06-24 01:38:02 +00:00
ccf4d4d7da
Module attributes from the parser
...
through to elaborated form.
2003-06-20 00:53:19 +00:00
3ef65d1298
Properly manage real variables in subscopes.
2003-06-13 19:10:45 +00:00
dc90f0d52d
Task/functions can have signed ports.
2003-06-13 00:27:09 +00:00
cb0a9b254e
More 2001 port declaration support.
2003-04-28 17:50:57 +00:00
561a268c9c
Break sized constants into a size token
...
and a based numeric constant.
2003-04-14 03:37:47 +00:00
658706ad8b
lex_strings.add module names earlier.
2003-03-06 04:37:12 +00:00
4c67de5ca7
Add the lex_strings string handler, and put
...
scope names and system task/function names
into this table. Also, permallocate event
names from the beginning.
2003-03-01 06:25:30 +00:00
e58030498f
specparams as far as pform.
2003-02-27 06:45:11 +00:00
9adbdcb7c5
Add support for signed ports and nets.
2003-02-02 19:02:39 +00:00
46253ed873
Rework expression parsing and elaboration to
...
accommodate real/realtime values and expressions.
2003-01-26 21:15:58 +00:00
ad6ff5562d
Missed a case of setting line on an PEident.
2003-01-17 05:47:30 +00:00
3c1426e631
Detect duplicate module declarations.
2003-01-16 21:44:19 +00:00
f56d763411
Move strstream to ostringstream for compatibility.
2003-01-14 21:16:18 +00:00
4a3459c87c
Spelling fixes.
2003-01-10 03:08:13 +00:00
7e1e44e87a
Properly cast signedness of parameters with ranges.
2002-09-01 03:01:48 +00:00
4de141ab1d
Support parameters with defined ranges.
2002-08-19 02:39:16 +00:00
52bf4e613f
conditional ident string using autoconfig.
2002-08-12 01:34:58 +00:00
5eca5d9948
Carry integerness throughout the compilation.
2002-06-21 04:59:35 +00:00
bfad382fd1
Carry Verilog 2001 attributes with processes,
...
all the way through to the ivl_target API.
Divide signal reference counts between rval
and lval references.
2002-05-26 01:39:02 +00:00
700887d657
Verilog 2001 attriubtes on nets/wires.
2002-05-24 04:36:23 +00:00
e6c0629626
Add language support for Verilog-2001 attribute
...
syntax. Hook this support into existing $attribute
handling, and add number and void value types.
Add to the ivl_target API new functions for access
of complex attributes attached to gates.
2002-05-23 03:08:50 +00:00
74c219f171
Add ranges and signed to port list declarations.
2002-05-20 02:06:01 +00:00
bf10c5762a
Parse port_declaration_lists from the 2001 Standard.
2002-05-19 23:37:28 +00:00
76b5d7e9e1
Fix first_file test for timescale warning.
2002-04-18 18:38:37 +00:00
0ab42597d9
Timescale warnings.
2002-04-15 00:04:22 +00:00
f7f61a8696
Detect mismatches in reg as module items and ports.
2002-04-12 02:57:08 +00:00
a624021a2e
Detect duplicate port declarations.
2002-01-31 04:10:15 +00:00
712080f7e0
Detect scalar/vector declarion mismatch.
2002-01-26 05:28:28 +00:00
361d4f2147
Drive strengths for continuous assignments.
2002-01-12 04:03:39 +00:00
steve