d883979fd8
Seperate arrayness from word count
2007-04-02 01:12:34 +00:00
fe02214fcc
do not calculate nexus name unless needed.
2007-03-26 16:51:48 +00:00
fc9a90c9e0
Add support for edge sensitive spec paths.
2007-03-02 06:13:22 +00:00
243cf94165
Add support for conditional specify delay paths.
2007-03-01 06:19:38 +00:00
6f3ddce7c4
Dead code for memories in scopes.
2007-01-17 05:00:12 +00:00
f5a7ee0736
Remove dead code related to memories.
2007-01-17 04:39:18 +00:00
91d84e7dc7
Major rework of array handling. Memories are replaced with the
...
more general concept of arrays. The NetMemory and NetEMemory
classes are removed from the ivl core program, and the IVL_LPM_RAM
lpm type is removed from the ivl_target API.
2007-01-16 05:44:14 +00:00
0edb5a7547
Basic support for specify timing.
2006-09-23 04:57:19 +00:00
182734fd4d
Remove dead code.
2006-09-20 22:31:23 +00:00
fc0695beb6
Handle 64bit delay constants.
2006-08-08 05:11:37 +00:00
80f30be9d0
Add support for system functions in continuous assignments.
2006-06-18 04:15:50 +00:00
d434dd7296
Allow part selects of memory words in l-values.
2006-02-02 02:43:57 +00:00
58f182a159
Node delays can be more general expressions in structural contexts.
2006-01-02 05:33:19 +00:00
4a8be3db9c
Implement bi-directional part selects.
2005-08-06 17:58:16 +00:00
b9799cf6ec
Remove NetVariable and ivl_variable_t structures.
2005-07-11 16:56:50 +00:00
75ad90534b
Generalize signals to carry types.
2005-07-07 16:22:49 +00:00
4413dd3c81
Fix compile errors.
2005-06-13 23:22:37 +00:00
739a1839ed
Do sign extension of structuran nets.
2005-05-24 01:44:27 +00:00
7dd0d255a6
Add support for variable part select.
2005-05-08 23:40:14 +00:00
365cfedd55
Update DFF support to new data flow.
2005-04-24 23:44:01 +00:00
6244dc1194
Make logic aware of strength.
2005-04-13 06:35:11 +00:00
65c7ec00e7
Rework NetRamDq and IVL_LPM_RAM nodes.
2005-04-06 05:29:08 +00:00
236ff2b278
Clean up handle of UDPs.
2005-04-01 06:04:30 +00:00
53da6e9a33
Add support for LPM_UFUNC user defined functions.
2005-03-18 02:56:03 +00:00
1c5b4881d7
Handle case inequality in netlists.
2005-03-09 05:52:03 +00:00
257e1f9516
Support shifts and divide.
2005-02-19 02:43:38 +00:00
d74177634c
Restructure NetMux devices to pass vectors.
...
Generate NetMux devices from ternary expressions,
Reduce NetMux devices to bufif when appropriate.
2005-02-12 06:25:40 +00:00
ee5bb5fcaf
Add the NetRepeat node, and code generator support.
2005-02-08 00:12:36 +00:00
97f83ffbe3
laborate reduction gates into LPM_RED_ nodes.
2005-02-03 04:56:20 +00:00
dfb7c7ba6f
Remove the NetEBitSel and combine all bit/part select
...
behavior into the NetESelect node and IVL_EX_SELECT
ivl_target expression type.
2005-01-24 05:28:30 +00:00
e28636776a
Change case compare from logic to an LPM node.
2005-01-22 01:06:55 +00:00
9e94afe399
Use PartSelect/PV and VP to handle part selects through ports.
2005-01-09 20:16:00 +00:00
8f2d679c8a
Unify elaboration of l-values for all proceedural assignments,
...
including assing, cassign and force.
Generate NetConcat devices for gate outputs that feed into a
vector results. Use this to hande gate arrays. Also let gate
arrays handle vectors of gates when the outputs allow for it.
2004-12-29 23:55:43 +00:00
5eb25e44e1
Add ivl_event_scope, and better document ivl_event_X methods.
2004-12-18 18:56:18 +00:00
4444079409
Fixup force statement elaboration.
2004-12-15 17:10:40 +00:00
65e9b6be12
Rework of internals to carry vectors through nexus instead
...
of single bits. Make the ivl, tgt-vvp and vvp initial changes
down this path.
2004-12-11 02:31:25 +00:00
e4ae832153
Clean up spurious trailing white space.
2004-10-04 01:10:51 +00:00
3dbc07f34d
Implement signed divide and signed right shift in nets.
2004-06-30 02:16:26 +00:00
e56b77a43f
Add support for wait on list of named events.
2003-12-03 02:46:23 +00:00
43f28b53a3
Design::get_flag returns const char* instead of string.
2003-11-10 20:59:03 +00:00
7521aa83f8
Pass FF synchronous set values to code generator.
2003-09-03 23:33:29 +00:00
64d795c53a
Preserve variable ranges all the way to the vpi.
2003-08-22 23:14:26 +00:00
e561819179
Add synthesis support for synchronous reset.
2003-08-15 02:23:52 +00:00
21ff80075a
Various warnings fixed.
2003-06-24 01:38:02 +00:00
bad861dba3
Module attributes make it al the way to ivl_target.
2003-06-23 01:25:44 +00:00
2a29c4fd62
Support real expressions in case statements.
2003-05-14 05:26:41 +00:00
f1cc9d865b
Support event names as expressions elements.
2003-04-22 04:48:29 +00:00
5d1d99a89f
Handle signed magnitude compare all the
...
way through to the vvp code generator.
2003-04-11 05:18:08 +00:00
1222153cdf
Keep parameter constants for the ivl_target API.
2003-03-10 23:40:53 +00:00
9c973efa9d
Wrong sense of need compared to have.
2003-03-06 04:32:40 +00:00
22d392a75c
Obsolete the ivl_event_name function.
2003-03-06 01:24:37 +00:00
badad63ab4
All NetObj objects have lex_string base names.
2003-03-06 00:28:41 +00:00
486274cfa1
Scope names stored only as basename.
2003-03-03 02:22:41 +00:00
a275133ff9
LPM objects store only their base names.
2003-02-26 01:29:24 +00:00
46253ed873
Rework expression parsing and elaboration to
...
accommodate real/realtime values and expressions.
2003-01-26 21:15:58 +00:00
c2070777b2
The $time system task returns the integer time
...
scaled to the local units. Change the internal
implementation of vpiSystemTime the $time functions
to properly account for this. Also add $simtime
to get the simulation time.
2002-12-21 00:55:57 +00:00
9ce2806710
Fix synth2 handling of aset/aclr signals where
...
flip-flops are split by begin-end blocks.
2002-10-23 01:45:24 +00:00
166621bcb3
Generate vvp code for asynch set/reset of NetFF.
2002-09-26 03:18:04 +00:00
52bf4e613f
conditional ident string using autoconfig.
2002-08-12 01:34:58 +00:00
14942b4b43
Dead code.
2002-08-07 02:17:14 +00:00
693e9e5ad0
Store only the base name of memories.
2002-08-05 04:18:45 +00:00
301040a67a
Avoid emitting to vvp local net symbols.
2002-07-05 21:26:17 +00:00
5eca5d9948
Carry integerness throughout the compilation.
2002-06-21 04:59:35 +00:00
422754f36f
Support carrying the scope of named begin-end
...
blocks down to the code generator, and have
the vvp code generator use that to support disable.
2002-05-27 00:08:45 +00:00
bfad382fd1
Carry Verilog 2001 attributes with processes,
...
all the way through to the ivl_target API.
Divide signal reference counts between rval
and lval references.
2002-05-26 01:39:02 +00:00
700887d657
Verilog 2001 attriubtes on nets/wires.
2002-05-24 04:36:23 +00:00
e6c0629626
Add language support for Verilog-2001 attribute
...
syntax. Hook this support into existing $attribute
handling, and add number and void value types.
Add to the ivl_target API new functions for access
of complex attributes attached to gates.
2002-05-23 03:08:50 +00:00
828ca0ef9d
Add API to support user defined function.
2002-03-17 19:30:20 +00:00
b7c2bd4f72
Add the NetUserFunc netlist node.
2002-03-09 02:10:22 +00:00
364ffc9024
Add support for bit select of parameters.
...
This leads to a NetESelect node and the
vvp code generator to support that.
2002-01-28 00:52:41 +00:00
dd79885f6d
Add structural modulus support down to vvp.
2002-01-03 04:19:01 +00:00
c8319bcc02
Add ivl_logic_delay function to ivl_target.
2001-12-06 03:11:00 +00:00
08f0f5a1f7
DLL target support for force and release.
2001-11-14 03:28:49 +00:00
ab9a853d52
ivl_target support for cassign.
2001-11-01 04:25:31 +00:00
75e78e86d3
ivl_target support for assign/deassign.
2001-10-31 05:24:52 +00:00
d350620315
Support multiple root modules (Philip Blundell)
2001-10-19 21:53:24 +00:00
177fa4062b
Support IVL_LPM_DIVIDE for structural divide.
2001-10-16 02:19:26 +00:00
e99059e001
Support attributes to logic gates.
2001-09-16 22:19:42 +00:00
d762a320dc
Make constants available through the design root
2001-09-01 01:57:31 +00:00
e79a371f76
Support DFF CE inputs.
2001-08-31 22:58:39 +00:00
2002c03cef
Add some ivl_target convenience functions.
2001-08-28 04:07:17 +00:00
e35ed6e91c
Change the NetAssign_ class to refer to the signal
...
instead of link into the netlist. This is faster
and uses less space. Make the NetAssignNB carry
the delays instead of the NetAssign_ lval objects.
Change the vvp code generator to support multiple
l-values, i.e. concatenations of part selects.
2001-08-25 23:50:02 +00:00
2802601c44
tgt-vvp generates code that skips nets as inputs.
2001-08-10 00:40:45 +00:00
c5a5a11b7f
Support getting the signal from IVL_EX_SIGNAL expressions.
2001-07-28 01:17:40 +00:00
becc7cb56a
Handle part select expressions as variants of
...
NetESignal/IVL_EX_SIGNAL objects, instead of
creating new and useless temporary signals.
2001-07-27 04:51:44 +00:00
629a02cccf
Fix binding of dangling function ports. do not elide them.
2001-07-27 02:41:55 +00:00
b825f8d2b2
Create a config.h.in file to hold all the config
...
junk, and support gcc 3.0. (Stephan Boettcher)
2001-07-25 03:10:48 +00:00
ce589da58a
Support the NetESubSignal expressions in vvp.tgt.
2001-07-22 00:17:49 +00:00
cd8e491028
Support calculated delays in vvp.tgt.
2001-07-19 04:55:06 +00:00
8cc89a3a1f
Pass parameters to system functions.
2001-07-07 20:20:10 +00:00
fb0c387b12
Detect and make available to t-dll the right shift.
2001-07-07 03:01:37 +00:00
bcaa122fb9
handle left shifter in dll output.
2001-07-04 22:59:25 +00:00
ab7b353ace
support fast programming by only writing the bits
...
that are listed in the input file.
2001-06-30 23:03:16 +00:00
4b82d26f5e
Add support for structural multiply in t-dll.
...
Add code generators and vvp support for both
structural and behavioral multiply.
2001-06-16 23:45:05 +00:00
bf42772995
Generate code to support memory access in continuous
...
assignment statements. (Stephan Boettcher)
2001-06-16 02:41:41 +00:00
b3a5a0e5ab
Generate vvp code for GT and GE comparisons.
2001-06-15 04:14:18 +00:00
2f2657b765
support subtraction in tgt-vvp.
2001-06-07 03:09:37 +00:00
f480943649
Support structural addition.
2001-06-07 02:12:43 +00:00
61991e6367
stub ivl_expr_parms for sfunctions.
2001-05-20 01:06:16 +00:00
0872ad34cf
Behavioral ternary operators for vvp.
2001-05-17 04:37:02 +00:00
steve