Commit Graph

527 Commits

Author SHA1 Message Date
Stephen Williams 2dcb1514a2 Add support for passing array words to system tasks.
Array words don't have a vpiHandle with a label, so the %vpi_call
needs a special syntac for arguments that reference array words.
This syntax creates an array word reference that persists and can
be used at a VPI object by system tasks.
2008-05-20 16:21:54 -07:00
Stephen Williams d71a1cb9c1 Fix non-blocking assign to part select of memory word.
Memory words may have part selects assigned, but the code messed up
the testing for the validity of the part select base. This fixes do
detect constant bases so that base validity tests are handled at
compile time.
2008-05-20 11:51:17 -07:00
Stephen Williams 96ec4b7eba Fix array inputs to mux devices.
The draw_input_from_net function was being used to access words of
a var array, which doesn't work. Have the draw_input_from_net punt
on that case, and by the way the mux inputs don't need to use that
function, instead they should use the general draw_net_input function
to get the input labels.
2008-05-19 17:37:23 -07:00
Stephen Williams 07c8fce530 Careful that select signal does not try to select reg words directly. 2008-05-19 11:44:03 -07:00
Stephen Williams 9a00829ee4 Use ivl_signal_dimensions to detect that signal is an array.
It is possible for an array to have 1 word in it, so using the array
count to detect an array is incorrect. Use the ivl_signal_dimensions
function, which is there exactly for that purpose.
2008-05-19 11:31:40 -07:00
Stephen Williams 680d3c8a3e Assign to variable array words using array indexing.
The non-array set statements no longer work on array words. Handle
the various cases properly.
2008-05-19 11:18:04 -07:00
Stephen Williams 42913e46b8 Fix non-blocking assign to variable arrays.
Non-blocking assignment with constant index was still trying to access
the vpi handle directly.
2008-05-16 16:33:04 -07:00
Stephen Williams 102cbb67b4 Rework variable arrays to not have vpi handles for every word.
Save tons of space per memory word by not creating a vpi handle for
each and every word of a variable array. (Net arrays still get a
vpiHandle for every word.) The consequence of this is that all
accesses to a variable array need to go through the indexing.

This commit handles the most common places where this impacts, but
there are still problems.
2008-05-16 10:38:32 -07:00
Stephen Williams 6b908aeec3 Arithmetic operands can do unsigned work and have signed result.
It is a quirk of the $signed() system function that the argument
is converted to signed, but the operation that is performed is
not changed. So arithmetic operators on unsigned arguments inside
a $signed() expression still perform unsigned arithmetic.
2008-05-14 11:51:53 -07:00
Stephen Williams ca517b5519 Handle corner cases of abs(), min() and max()
The abs() function needs to be able to turn -0.0 into 0.0. This proved
to be too clunky (and perhaps impossible) to do with tests and jumps,
so add an %abs/wr opcode to do it using fabs().

The min/max functions need to take special care with the handling
of NaN operands. These matter, so generate the extra code to handle
them.
2008-05-06 22:19:59 -07:00
Stephen Williams 10ab5cf698 Merge branch 'verilog-ams' 2008-05-06 21:00:12 -07:00
Stephen Williams 523de1b69c Handle the abs() function in net context.
In net context we have to create a node that does the abs() function
for us. Elaborate that node and handle it all the way down to vvp.
2008-05-06 20:37:00 -07:00
Cary R 4f8b91e65c Add file and line information for parameters, etc.
This patch adds file and line information for parameters and
local parameters. It also adds file/line stubs for signals in
the tgt-* files. It adds the pform code needed to eventually
do genvar checks and passing of genvar file/line information.
It verifies that a genvar does not have the same name as a
parameter/local parameter.
2008-05-06 07:14:27 -07:00
Stephen Williams cc7187c172 Add support for abs() in logic threads.
Add the code generator code to handle the abs() function in signed
logic. Handle some of the interesting special cases as well.
2008-05-04 22:00:01 -07:00
Stephen Williams d60df2d75b Implement abs/min/max operators for real values.
Implement in behavioral the abs/min/max operators for real values.
The parser treats these builtin functions as operators, unary or
binary, and elaborates them appropriately.

Also add enough code generator support to handle real valued expressions
in thread context.
2008-05-03 21:54:42 -07:00
Cary R 86a4025b58 Push file and line information for scopes to the runtime.
This patch adds code to push the file and line information
for scope objects (modules, functions, tasks, etc.) to the
runtime. For modules, this includes the definition fields.
2008-04-29 21:51:34 -07:00
Cary R 436e2fca13 Add ifnone functionality.
This patch adds ifnone functionality. It does not produce an
error when both an ifnone and an unconditional simple module
path are given. For this case the ifnone delays are ignored.
2008-04-29 11:55:32 -07:00
Cary R 7b705a0212 Generate mixed real/vector expressions when needed.
When generating a real expression you can have bits of the
expression that use vector only operands. When this happens
evaluate that part of the expression as a vector and then
convert it to a real value.
2008-04-22 19:42:57 -07:00
Cary R 6eb9825ab7 Add force/release and assign/deassign for real values.
This patch adds assign/deassign for real variables and force/release
for real variables and nets.
2008-04-17 20:18:20 -07:00
Stephen Williams 373123af6b Detect thread bit allocation failures
Detect thread bit allocation failures and fail gracefully. Print an
error message that points at the expression in question, and return
with an error code so that the compiler exits with an error.
2008-04-15 21:51:03 -07:00
Cary R 9bb8e8146f Add assign/deassign to bit/part selects and other fixes
This patch adds the ability to assign/deassign a bit or part select.
It also cleans up the code and fixes some problem in the forcing of
strength aware nets.
2008-04-15 17:46:44 -07:00
Cary R 2be8534021 Add %assign/av/d opcode.
This patch adds a %assign/av/d opcode. This is a version of %assign/av
that allows a delay expression. Ultimately this allows a dynamically
indexed array to have a delay expression (non-constant delay value).
2008-04-09 21:24:37 -07:00
Cary R 8cece424d1 In the context of a force/assign you cannot reuse a saved signal value.
This patch removes the overly optimistic lookaside save for a signal
that has been set (%set/v). This is incorrect because if a force or
assign are active the value will not be set as expected.
2008-04-09 21:10:11 -07:00
Cary R f5418fe337 Catch unsupported bit/part select lvalue for assign/deassign.
This patch adds code to print a message when an assign/deassign is used
to drive/release a bit/part select.
2008-04-07 20:52:54 -07:00
Cary R bdc48135e5 Fix two comparisons in tgt-vvp/eval_expr.c to use correct variable.
This patch fixes two comparison that were using the wrong variable
to determine when the end of the object had been reached.
2008-04-04 21:31:14 -07:00
Cary R bb14ac1fe0 Add functionality to alias an individual word of an array.
This patch adds the functionality to alias an individual word
of an array.
2008-03-26 21:44:57 -07:00
Cary R 12f8af645f Add support for real parameters in vvp.
vvp did not have the ability to handle real parameters.
This patch fixes that omission. Parameters are only used
by vpi calls to get compile time information.
2008-03-26 18:04:57 -07:00
Cary R ef9ee52e53 NetESignal::dup_expr() was not passing the word_ information.
The dup_expr() function for NetESignal was not copying the word_
expression. This would cause an individual array access to turn
into an entire array access. The file and line information was
also not being set correctly.

An assert() in tgt-vvp/eval_expr.c was also replaced with an
exit() since the appropriate information was already being
printed.
2008-03-12 20:55:12 -07:00
Cary R 234648231b Add bit/part select release for constants and add an error check.
This patch adds functionality to do a bit or part select release
when a constant value is forced to the net/register. It also adds an
error message when the user tries to force a signal to a bit/part
select. This is not currently handled by the run time, so is now
caught in the compiler (tgt-vvp). Where when this functionality is
needed, it will be easy to know what to do instead of trying to track
down some odd runtime functionality.

What this all means is that you can force a signal to an entire
signal or you can force a constant to any part of a signal (bit,
part or entire) and release any of the above. Technically the
release of a constant value does not have to match the force.
The runtime verifies that if you are releasing a signal driver
it is being done as a full release. I don't see an easy way to
check this in the compiler.

To fix the signal deficiencies we need to rework the force_link
code to allow multiple drivers and partial unlinking. Much of
this is in the runtime, but the %force/link operator may also
need to be changed like I did to the %release opcode.
2008-03-11 19:56:58 -07:00
Cary R cc28a9a734 Improve error message in tgt-vvp/eval_expr.c:draw_eval_expr_wid().
The IVL_EX_NONE type was not displaying any message and default did not
use the new ivl_expr_{file,lineno} functions to get the source location.
This patch remedies these problems.
2008-03-11 19:47:22 -07:00
Cary R fe72d02cf6 Major rework of the ternary operator elaboration code.
This patch reworks much of the ternary code to short circuit when
possible and supports real values better. It adds a blend operator
for real values that returns 0.0 when the values differ and the value
when they match. This deviates slightly from the standard which
specifies that the value for reals is always 0.0 when the conditional
is 'bx. There are also a couple bug fixes.

These fixes have not been ported to continuous assignments yet.
Ternary operators used at compile time and in procedural assignments
should be complete (short circuit and support real values).
2008-03-08 19:45:13 -08:00
Larry Doolittle 39dd22ace4 Adjust unusual spacing
minimal changes, nearly eliminates oddball/inconsistent
source code use of whitespace
2008-02-19 09:15:03 -08:00
Larry Doolittle f9bf502324 Correct format string
vvp_scope.c:1741: warning: format '%d' expects type 'int', but argument 5 has type 'long unsigned int'
introduced in commit
  331faa2217
2008-02-15 13:26:24 -08:00
Cary R b6f26e62df Add support for delaying constants at T0.
This patch adds support for delaying constants at time zero. It also
cleans up the code in elab_net.cc to use this capability instead of
building it with an extra BUFZ to carry the delay information.
2008-02-13 20:10:55 -08:00
Cary R 2bab415626 Add message for unsupported release of part/bit select.
This patch adds a real error message instead of an assert when
someone attempts to release a part or bit select. I plan to work
on the real functionality soon.
2008-02-13 15:37:53 -08:00
Cary R 331faa2217 Add signed bit based power to continuous assignments.
This patch adds the power operator for signed bit based values
in a continuous assignment. It also fixes a few other power
expression width problems. The expression width is still not
calculated correctly, since the correct method can produce huge
possible bit widths. The result is currently limited to the width
of the native long. This is because lround() is used to convert
from a double to an integer. A check in the code generator protects
the runtime from this limitation.
2008-02-11 20:06:41 -08:00
Stephen Williams 0ac36dc5af Merge branch 'master' of steve-icarus@icarus.com:git/verilog 2008-02-06 18:38:55 -08:00
Stephen Williams 3a300725de Output delays for part select nets.
Implement net delays for part select devices.
2008-02-06 18:37:42 -08:00
Cary R 85229a6cdc Add unsigned bit based power to continuous assignments.
This patch adds the power operator for unsigned bit based values
in a continuous assignment. It also refactors the power code for
normal expressions and continuous assignments.
2008-02-06 14:38:16 -08:00
Cary R 47d1d981d5 Mangle the scope for user functions in a continuous assignment.
User functions called in a continuous assignment were not getting
their scope mangled. This is needed to handle arrayed instances and
possibly other things.
2008-02-06 14:28:08 -08:00
Cary R e82293c981 Add unsigned bit based power support to normal expressions.
This patch adds bit based power support to normal expressions.
It also pushes the constant unsigned bit based calculation to
the runtime until the bit based method can be copied to the
compiler. Continuous assignments also need to use this type
of calculation.
2008-02-05 15:33:51 -08:00
Cary R 40064b3181 Catch that we do not currently support unsigned bit based power.
This patch adds a check and prints a warning message when the power
operator is used with unsigned bit based values. It also fixes a couple
of typos and adds an asserts if the above power operator happens to
get to the tgt-vvp back end.
2008-02-04 13:35:44 -08:00
Cary R 1595ae79fd Add support for real power (**) in normal expressions.
This patch adds support for the real power (**) operator in
normal expressions.
2008-01-31 19:54:37 -08:00
Cary R f049426f25 Add support for real % in a continuous assignment.
This patch adds conditional support (2001X) for the real modulus
operator in a continuous assignment.
2008-01-31 16:56:11 -08:00
Cary R 5e8a1bd8cc Add power operator (**) for real values in a continuous assignment.
This patch adds the power operator for real values in a continuous
assignment.
2008-01-31 16:48:52 -08:00
Cary R 4c5481f254 Add delays for shifts, concatenation and replication in a CA.
This patch add delays in continuous assignments for the shift operators,
concatenations and replications. It also reports an error if the user
attempts to take the modulus of a real value.

This patch uncovers a couple other problems in the system. I am trying
to fix one of them. I will report the other problem shortly.
2008-01-31 16:39:12 -08:00
Cary R 1609de6ed9 Fix some bit based delays in continuous assignments.
This patch fixes some of the delays in bit based continuous
assignments (unary -, unary +constants, string constants,
reduction operators and user functions).

Use draw_lpm_output_delay() in all functions that need it.
2008-01-29 20:27:53 -08:00
Larry Doolittle d9ac146b8f Spelling fixes
only comments and documentation
some punctuation and capitalization for good measure
Changelogs are purposefully untouched
2008-01-29 20:24:24 -08:00
Stephen Williams 685095b229 Support delay of user function output
When used in continuous assignments, user defined functions may have
delayed output. Handle that by generating the proper .delay node when
needed to delay the output of a .ufunc node.
2008-01-28 21:29:03 -08:00
Cary R 10d25d2b88 Support delays for all operators in a continuous assignments.
Previously only the logical operators (~, &, |, ^, etc.) supported a
delayed value in a continuous assignment. This patch should extend this
to all operators. An extensive check of real values was done. The same
will be done shortly for bit based nets.

Checks for constructs currently unsupported in continuous assignments
provide a more explicit message (** operator, real user functions,
{!, && and ||} operators with a real argument).
2008-01-21 18:21:31 -08:00