Commit Graph

265 Commits

Author SHA1 Message Date
Larry Doolittle bb1036b55c Spelling refresh 2012-04-09 16:19:02 -07:00
Larry Doolittle 0aefcf9b48 Trivial fixes to grammar, spelling, whitespace 2012-02-17 16:18:22 -08:00
Stephen Williams 3e4f8b625f Get packed signals working through to simulation in some situations.
When dynamic indexing of early dimensions is not needed, we can get
pretty far with getting packed arrays to work.
2012-02-10 17:17:59 -08:00
Stephen Williams 3dabb2970d Get compressed assignment opcodes through to the ivl_target API. 2011-11-27 16:46:02 -08:00
Cary R eab5bacf9f Remove clang/clang++ warnings.
This patch makes the code consistently use struct/class in the C++ files,
it removes a couple shadow warnings and where a class pointer is passed to
the C routines, it defines the pointer as a class for C++ and as struct for
C and it removes a namespace std duplication.
2011-09-25 10:14:04 -07:00
Cary R b2ebc29c5a Fix some enum bugs.
This patch fixes a few more bugs in the enumeration code.

It add support for saving the file and line information to make
diagnostic messages better.

It updates some of the compiler warning messages to use the file
and line information.

It passes if the enumeration type is signed all the way to the
code generators.

It fixes the parser to correctly have the range after the signed
designation for the vector types.

It adds a warning that vvp does not currently support a negative
two state enumeration value.
2011-09-11 11:32:16 -07:00
Jared Casper 9b785031f5 Implement SystemVerilog final statements.
Add a new IVL_PR_FINAL process type.

Add a flag to NetScope in_final_ which is set when elaborating the
statement of a final procedure.

Add checks during statement elaboration for invalid statements in a
final procedure, similar to checks for statements in functions.

Do a final check to make sure no final blocks have delays.

In the vvp runtime, use "$final" as the flag for the thread created by
the final procedure.  During compilation, instead of adding such a
thread to the sched_list, add it to a new schedule_final_list that
mirrors the schedule_init_list, but is run at the end of simulation.
2011-08-11 14:31:38 -07:00
Martin Whitaker 5fc1a9c9e0 Fix for pr3368642.v.
The vvp target code generator may not elide a BUFZ if the output of
the BUFZ is connected to a net that is the subject of a procedural
force statement.
2011-08-07 11:15:16 -07:00
Larry Doolittle 347cc67e71 Spelling and related fixes
No effect on executable code.
2011-04-27 10:36:00 -07:00
Cary R eb0df40a73 Add a routine to say if a logical came from a CA and some other fixes.
This patch adds code that allows the targets to determine if a logical
gate came from a continuous assignment. This helps some of the targets
generate code that more closely matches the input.

It also reworks/simplifies the synthesis of && and || since the
compiler has already converted the two operands to single bit form
and fixes a mismatched delete from a previous patch.
2011-03-23 11:39:38 -07:00
Cary R 1e3af45335 Pass some module port information and fix a few bugs.
This patch adds some preliminary module port information to the ivl
interface. This may change as I investigate exactly what is needed.
It also fixes a few minor bugs (a missed local variable and spacing)
2011-03-08 19:15:28 -08:00
Cary R a6220fe562 Add support for passing variable indexed part select type information
This patch modifies the compiler and the ivl interface to pass the
type of indexed part select that is being represented (up/down) in
a procedural L-value or R-value. This is needed by any back end that
wants to correctly denormalize the (zero based) base expression.
2011-02-28 19:15:48 -08:00
Cary R 53abd7a5b2 Add support for getting the original port names of a UDP definition.
This patch adds support to the compiler/ivl interface for getting the
original UDP definition port names. ivl_udp_port() was added to get
this information.
2011-02-28 18:38:15 -08:00
Cary R 629ee5b899 Fix a number of file/line issues in the compiler.
This patch fixes a bunch of objects to have the correct file/line
information. It also adds support for getting file/line information
for events (named events have a definition line).
2011-02-10 19:10:21 -08:00
Cary R 427aef8cc4 Add more file/line and scope information to the ivl interface, etc.
This patch adds/fixes the following:

  Adds file/line information to a UDP definition.

  Prints an error message if a UDP is passed signals wider than 1 bit.
  A UDP should supports a range, but the compiler currently does not.

  Add scope information for constants.

  Fix the Icarus extension UDP table entry element 'h' to use h.

  The ivl_udp_init() value is a char not unsigned.

  Add FILE_NAME() for a bunch more of the ivl interface objects.
2011-02-10 19:04:08 -08:00
Cary R f01b25b60c Add support for ivl_const_{file,lineno}
This patch adds support for ivl_const_file() and ivl_const_lineno()
to the target interface.
2011-01-31 12:10:03 -08:00
Cary R 60d08d5f02 vlog95: add ability for user to change space increment.
This patch adds the ability for the user to change the spacing increment
from the command line using the -pspacing=<num> flag. The is restricted to
be a value between and including 1 and 16.
2011-01-26 18:02:51 -08:00
Cary R 69ec4cfc6d Add support for ivl_logic_{file,lineno}
The logic devices were missing the file/line number interface. This patch
adds the routines and propagates the information as needed.
2011-01-18 17:17:18 -08:00
Cary R d5352ca47a Add missing support for task ports in ivl interface
It was documented that ivl_scope_port(s)() could be used with tasks,
but the code did not support this. This patch adds that functionality
as documented. It also removes the documentation for ivl_lval_mem()
since that function no longer exists.
2011-01-12 16:40:05 -08:00
Stephen Williams 8a91931d49 Properly handle base-type logic enumerations.
The next()/prev() methods need to know of the base type
so that the comparisons can go right.
2010-11-21 17:24:46 -08:00
Stephen Williams de215f1f8d Describe enum type to code generators
This gets the enumeration type through to the ivl_target API so
that code generators can do something with it. Generate stub
output with tgt-stub, and generate the proper vvp run time to
make simple enumerations work from end to end.
2010-11-20 15:09:32 -08:00
Stephen Williams 94acc39b55 Detect the net.name() method and generate a system function.
SystemVerilog .name() methods can be converted to equivilent
system functions.
2010-10-31 14:07:38 -07:00
Stephen Williams 9c634e1640 Add a net node for casting to IVL_VT_BOOL values.
BOOL values have a specific cast from LOGIC, this node takes care
of it. Also arrange for the elaboration to insert them in the right
planes and for the code generator to generate them.
2010-10-16 10:53:20 -07:00
Stephen Williams ec49f10e2d Revert bad merge from vhdl branch 2010-10-02 11:02:27 -07:00
Stephen Williams 2c11850f3c Merge branch 'master' of ssh://steve-icarus@icarus.com/home/u/icarus/steve/git/verilog 2010-08-15 16:38:11 -07:00
Cary R f29d09dcbe Add uwire support/functionality to the stub and vvp back ends
This patch adds a check in the vvp back end that a uwire has
at most one driver. Previously this was just converted (with
a warning message) to a wire just after elaboration.
2010-08-15 16:29:20 -07:00
Cary R 03f6283203 Add support for calling system functions as a task (SystemVerilog)
This patch adds the ability to call a system function as a task for
the SystemVerilog generation (-g2009). The return value is really
calculated, but it is ignored.
2010-08-13 20:05:23 -07:00
Cary R 2bf3f5d1d3 Push tranif delays to the code generator.
This patch pushes delays for tranif gates to the code generator.
We still need to add checks for the number of delays, etc. For
now an error message is printed when a tranif gate is given a
non-zero delay.
2010-07-13 16:04:05 -07:00
Stephen Williams fb1853144b Continuous assignments have their own driver
Elaborate conditional assignments with BUFZ devices that do *NOT*
preserve strengths. Add a BUFT (transparent) device that can be
used in those cases where I really need a transparent buffer.
2010-07-11 17:16:15 -07:00
Cary R e241586bcf Add support for passing the delay selection to vvp.
This patch adds support for passing the delay selection to vvp.
It adds a new header :ivl_delay_selection "<value>"; that has
the values TYPICAL, MINIMUM or MAXIMUM depending on the -T
flag to iverilog. This information is needed by $sdf_annotate
to select that appropriate value for a triplet when
"TOOL_CONTROL" is specified (default).
2010-03-16 15:43:06 -07:00
Stephen Williams bf4e7454eb Account for output drive of LPM mux devices.
LPM devices, and LPM MUX devices in particular, need to
have their drive strength accounted for.
2010-03-16 14:25:00 -07:00
Stephen Williams 33e52c50c0 Handle special case bit selects if unsized 0/-1.
Unsized constant 0 and -1 are pretty special, and part selects
of these values can be handled very specially.
2010-03-05 19:36:54 -08:00
Stephen Williams e983e75780 Elide nets that can't work.
In auto scopes, nets cannot work and probably are are artifact of
elaboration. So elide local nets in auto scopes.

Also, get net inputs from the inputs of nets. This is a step
towards eliminating the label on nets altogether.
2009-09-21 22:15:10 -07:00
Cary R 636758f66d Add support for `celldefine, vpiCellInstance
This patch adds real functionality for `celldefine and pushes this
property to the run time which can access this with vpiCellInstance.
This is technically only available for a module, but all scopes
have the property and only modules should return true when the
'endmodule' is between a `celldefine and `endcelldefine directive.
2009-05-23 14:13:47 -07:00
Cary R 158e9fd2be Keep the left and right array range value order information.
Previously Icarus normalized the results so array [7:0] would
be the same as array [0:7]. This works just fine for
simulation, but the VPI calls can select the left or right
value and this was incorrect for the [7:0] case since it was
being normalized to [0:7]. This patch swaps the two values in
the a.out file and from this creates the previous first/last
values and a new flag that can be used to get the correct
left and right values for the VPI interface.
2009-02-24 07:33:42 -08:00
Cary R 5ae86bd6b4 Add support for 64 bit delays in procedural non-blocking assignments.
This patch adds support for 64 bit non-blocking delays in procedural
code. We fixed the procedural delay operator (blocking delays) earlier.
This patch mostly mimics what was done there. The continuous assignment
delay operator still needs to be fixed.
2009-02-17 10:32:11 -08:00
Stephen Williams a2aff77ca2 Avoid creating Nexus objects until they are really needed.
By not creating Nexus objects until necessary, we avoid creating a
lot of spurious objects. In fact, it is true that almost every
link that is created and connected to another link will create a
spurious Nexus object without this patch.
2009-01-07 22:07:08 -08:00
Martin Whitaker 21f33085f0 Fix for pr2123173.
Functions that appear in continuous assignment expressions and that
have hidden dependencies or side effects need to be re-evaluated
whenever any input to the expression changes. This patch adds support
in the compiler and vvp runtime to enable this. This is currently
activated for any system function call that has no arguments. The
user may also force it to be used for any user function by passing
the option -gstrict-ca-eval to the compiler driver.

This patch also removes the -dautomatic option which was used for
gaining confidence in the code that supports automatic tasks and
functions. It is believed that the testsuite provides reasonable
fault coverage, and further tests can be added if bugs are found.
2008-12-29 16:09:33 -08:00
Stephen Williams 16e5197325 Branches are parts of islands.
Expose the island information for branches to the ivl_target API.
2008-11-24 22:00:33 -08:00
Stephen Williams 87177087c4 ivl_target.h access branch terminals
Fill in the functions to add branch terminals, and add code in the
stub to check that the terminals are present and reasonable.
2008-11-23 22:38:33 -08:00
Stephen Williams d8ec6fc42a Add functions for targets to scan disciplines.
The disciplines are, from the perspective of the ivl target, collected
into the design. Add functions for the target to scan the disciplines
in the design.

In the process, also clean up the handlng of design constants.
2008-11-23 21:29:54 -08:00
Stephen Williams da85c4fe00 Give the branch access expression type some meat.
In the ivl_target API, the IVL_EX_BACCESS expression type gets some meat,
specifically references to the branch it accesses and the the nature to
be accessed on that branch.
2008-11-11 20:41:14 -08:00
Stephen Williams 00df651c5f Branch references all the way down to the stub generator.
This includes enough API to get the branch nexus bits and signals
and show them in the dump. This also includes creating the reference
ground for branch access functions that use the implicit ground.
2008-11-09 21:42:12 -08:00
Stephen Williams 13aaaab783 Bring analog contribution statements to the ivl_target API.
Add support for analog processes with analog contributation statements
all the way down to the ivl_target code generator API.
2008-11-06 21:31:34 -08:00
Stephen Williams eb240ddb73 Bring discipline natures all the way to the ivl_target API.
The natures of disciplines were already available, this just brings
the information forward to the ivl_target.h API and exposes them via
access functions.
2008-11-03 21:10:10 -08:00
Stephen Williams 77eb68d314 Minor documentation improvements. 2008-11-02 16:56:25 -08:00
Stephen Williams f4687757f1 Bring signal discipline all the way to the ivl_target API.
Signals may have VMA disciplines attached. Make the attached discipline
visible through the ivl_target.h API. Also, re-arrange the internal
handling of the discipline structure so that we can expose disciplines
through the ivl_target C API without creating new structures. The
t-dll-api implementations of the discipline access functions can look
at the elaborated discipline structure directly. This is possible since
the discipline parse and elaboration are very simple.
2008-11-02 08:10:41 -08:00
Stephen Williams 864a86f7ee Multiply nodes are always unsigned.
It is up to the elaborator to sign-extend the inputs if the multiply
is signed in the Verilog source. The run time always processes the
multiply as unsigned.
2008-10-11 21:08:14 -07:00
Stephen Williams 3aaea46144 Content-free portability fixes.
These are patches from ITOH Yasufumi and Larry Doolittle of pr2120948.
They change nothing, but make the code compile with older compilers.
2008-09-29 18:06:47 -07:00
Martin Whitaker 7ebcc6b357 Support for automatic tasks and functions.
This patch adds support for automatic tasks and functions.
Refer to the overview in vvp/README.txt for details.
2008-09-27 15:51:16 -07:00