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Elide nets that can't work. 

In auto scopes, nets cannot work and probably are are artifact of
elaboration. So elide local nets in auto scopes.

Also, get net inputs from the inputs of nets. This is a step
towards eliminating the label on nets altogether.
This commit is contained in:
Stephen Williams 2009-09-21 22:15:10 -07:00
parent b75f02c889
commit e983e75780
3 changed files with 16 additions and 3 deletions
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1
ivl_target.h
View File

@ -1739,6 +1739,7 @@ extern int ivl_scope_time_units(ivl_scope_t net);
* Returns the file and line where this signal is defined.
*/
extern ivl_scope_t ivl_signal_scope(ivl_signal_t net);
extern ivl_nexus_t ivl_signal_nex(ivl_signal_t net, unsigned word);
extern int ivl_signal_array_base(ivl_signal_t net);
extern unsigned ivl_signal_array_count(ivl_signal_t net);

6
t-dll-api.cc
View File

@ -1926,6 +1926,12 @@ extern "C" int ivl_signal_lsb(ivl_signal_t net)
return net->lsb_index;
}
extern "C" ivl_scope_t ivl_signal_scope(ivl_signal_t net)
{
assert(net);
return net->scope_;
}
extern "C" unsigned ivl_signal_width(ivl_signal_t net)
{
return net->width_;

12
tgt-vvp/vvp_scope.c
View File

@ -479,6 +479,12 @@ static void draw_net_in_scope(ivl_signal_t sig)
iword, msb, lsb, driver,
nex_data->drivers_count,
strength_aware_flag?", strength-aware":"");
} else if (ivl_signal_local(sig) && ivl_scope_is_auto(ivl_signal_scope(sig))) {
assert(word_count == 1);
fprintf(vvp_out, "; Elide net v%p_%u name=%s\n",
sig, iword, ivl_signal_basename(sig));
} else {
/* If this is an isolated word, it uses its
own name. */
@ -897,15 +903,15 @@ static void draw_logic_in_scope(ivl_net_logic_t lptr)
sig = ivl_expr_signal(rise_exp);
assert(ivl_signal_dimensions(sig) == 0);
fprintf(vvp_out, ", v%p_0", sig);
fprintf(vvp_out, ", %s", draw_net_input(ivl_signal_nex(sig,0)));
sig = ivl_expr_signal(fall_exp);
assert(ivl_signal_dimensions(sig) == 0);
fprintf(vvp_out, ", v%p_0", sig);
fprintf(vvp_out, ", %s", draw_net_input(ivl_signal_nex(sig,0)));
sig = ivl_expr_signal(decay_exp);
assert(ivl_signal_dimensions(sig) == 0);
fprintf(vvp_out, ", v%p_0;\n", sig);
fprintf(vvp_out, ", %s;\n", draw_net_input(ivl_signal_nex(sig,0)));
}
}
}