Commit Graph

223 Commits

Author SHA1 Message Date
Cary R 1e60754ff0 Partial non-blocking event control implementation
This patch pushes the non-blocking event control information to
the code generator. It adds the %evctl statements that are used
to put the event control information into the special thread
event control registers. The signed version (%evctl/s) required
the implementation of %ix/getv/s to load a signed value into
an index register. It then adds %assign/wr/e event control based
non-blocking assignment for real values. It also fixes the other
non-blocking real assignments to use Transport instead of inertial
delays.
2008-09-12 20:00:28 -07:00
Larry Doolittle 66949122cf Non-controversial whitespace cleanup
Nothing to do with tab width!  Eliminates useless
trailing spaces and tabs, and nearly all <space><tab>
pairings.  No change to derived files (e.g., .vvp),
non-master files (e.g., lxt2_write.c) or the new tgt-vhdl
directory.

Low priority, simple entropy reduction.  Please apply
unless it deletes some steganographic content you want
to keep.
2008-09-04 21:31:30 -07:00
Stephen Williams 1ca8241b88 Merge branch 'master' into verilog-ams 2008-08-29 19:03:34 -07:00
Cary R 11109f519c Push the automatic property for tasks and functions to the code gen.
This patch pushes the automatic property for both tasks and
functions to the code generators. The vvp back end does not
currently support this so it will error out during code
generation. The VHDL back end should be able to use this
property and tgt-stub prints the property. Having this will
also make it easier when we do adding this to the runtime.
2008-08-20 09:23:14 -07:00
Stephen Williams c14987aa18 Merge branch 'master' into verilog-ams 2008-08-01 21:15:11 -07:00
Cary R 61930c3b6e Add file and line information to processes.
This patch adds file and line information to processes
(initial and always).
2008-08-01 20:13:29 -07:00
Stephen Williams 221c63b766 Add some simple error checking. 2008-07-30 18:02:07 -07:00
Cary R 27cdd27889 Add .cast/int and update .cast/real.
This patch adds .cast/int and updates .cast/real to act as a local
(temporary) net and to support either a signed or unsigned input.
The vvp_vector4_t class not can convert an arbitrarily sized double
to a vector value. This removes the restriction of lround().

Also document the new statements.
2008-06-20 19:45:18 -07:00
Stephen Williams 37723698dc Handle non-real operands to real division.
This handles the general case of a non-real operand to a real-valued
division. This can turn up if only 1 operand of a divide is real. In
this case the division as a whole is real and the other operand must
be cast to real.

This method creates an extra node, but it should be a very compact
node and this node does no evaluation tricks so in the run time should
be no more expensive then folding the cast into the .arith/div.r itself.
2008-06-17 17:07:19 -07:00
Stephen Williams 73e2b297df Replace the NetPartSelect:BI with NetTran(VP).
Fold the bi-directional part select into the pass switch (tran) support
so that it can be really bi-directional. This involves adding a new
tranvp device that does part select in tran islands, and reworking the
tran island resolution to handle non-identical nodes. This will be needed
for resistive tran devices anyhow.
2008-06-03 11:16:25 -07:00
Stephen Williams df15a0368c Collect NetTran devices into islands.
NetTran devices must be collected into islands because they are all
a bi-directional mass. This is how vvp will process them and the code
generator will need a head start organizing them.
2008-06-01 19:45:12 -07:00
Stephen Williams 7898f4e402 Account for swithes linked to nexus in ivl_target.h API.
Switches can connect to a nexus too, so add the missing nexus support
for that in the ivl_target.h API.
2008-06-01 14:29:27 -07:00
Stephen Williams de7fff8ac6 Elaborate tran devices (switches)
This takes the support for switch modeling to the code generator.
Add error messages in the vvp code generator for lack of support.
2008-05-27 20:06:58 -07:00
Stephen Williams ca756f3ec3 Bring switch information out to the ivl_target API.
This involves defining the API for switches and cleaning up the
elaborated form to match the defined ivl_target API. Also add t-dll
code to support the ivl_switch_t functions, and add stub code that
checks the results.
2008-05-23 20:53:10 -07:00
Stephen Williams 10ab5cf698 Merge branch 'verilog-ams' 2008-05-06 21:00:12 -07:00
Cary R 4f8b91e65c Add file and line information for parameters, etc.
This patch adds file and line information for parameters and
local parameters. It also adds file/line stubs for signals in
the tgt-* files. It adds the pform code needed to eventually
do genvar checks and passing of genvar file/line information.
It verifies that a genvar does not have the same name as a
parameter/local parameter.
2008-05-06 07:14:27 -07:00
Stephen Williams e91243e1c6 Elaborate abs() is continuous assign expressions.
In continuous assign expressions, the abs() operator can't easily be
burried in generic unary handling, so add the IVL_LPM_ABS type and
generate it as needed.
2008-05-05 22:00:39 -07:00
Cary R 86a4025b58 Push file and line information for scopes to the runtime.
This patch adds code to push the file and line information
for scope objects (modules, functions, tasks, etc.) to the
runtime. For modules, this includes the definition fields.
2008-04-29 21:51:34 -07:00
Cary R 436e2fca13 Add ifnone functionality.
This patch adds ifnone functionality. It does not produce an
error when both an ifnone and an unconditional simple module
path are given. For this case the ifnone delays are ignored.
2008-04-29 11:55:32 -07:00
Cary R b6f26e62df Add support for delaying constants at T0.
This patch adds support for delaying constants at time zero. It also
cleans up the code in elab_net.cc to use this capability instead of
building it with an extra BUFZ to carry the delay information.
2008-02-13 20:10:55 -08:00
Cary R 5e8a1bd8cc Add power operator (**) for real values in a continuous assignment.
This patch adds the power operator for real values in a continuous
assignment.
2008-01-31 16:48:52 -08:00
Cary R 10d25d2b88 Support delays for all operators in a continuous assignments.
Previously only the logical operators (~, &, |, ^, etc.) supported a
delayed value in a continuous assignment. This patch should extend this
to all operators. An extensive check of real values was done. The same
will be done shortly for bit based nets.

Checks for constructs currently unsupported in continuous assignments
provide a more explicit message (** operator, real user functions,
{!, && and ||} operators with a real argument).
2008-01-21 18:21:31 -08:00
Cary R 07c6e51a58 Rework ivl_file_table_* interface and fix most vvp/examples.
Rework the ivl_file_table_* interface to be more generic and easier
to use. Also all the vvp examples except for memory.vvp have been
fixed to run correctly with the current vvp. Someone with a bit more
experience will need to fix memory.vvp.
2008-01-03 14:13:22 -08:00
Cary R c866be421e Add vpiFile and vpiLineNo to .sfunc (system function in cont. assign)
This patch add the vpiFile and vpiLineNo properties to system
functions that are called from continuous assignments.
2008-01-01 17:33:08 -08:00
Cary R 77061faa5c Add vpiFile and vpiLineNo for system functions.
Add the vpiFile and vpiLineNo properties to system functions.
Most other objects have stubs that return "N/A"/0. Interactive
functions (called from the debugger) use <interactive> for the
file name.
2008-01-01 17:27:03 -08:00
Stephen Williams 08752453b4 File line information for expressions
Add ivl_target support for file and line numbers of expressions.
2007-12-22 17:19:45 -05:00
Stephen Williams 1db19b8703 Make statement file lineno available to targets.
Make the Verilog file/lineno of statements available to loadable
code generators. Make sure the information is properly set for
system task calls.
2007-12-22 09:31:24 -05:00
Stephen Williams 0d9ed65e8c Give delay paths scope.
Delay paths need a scope. This helps the code generators bind the
modpaths to the correct scope. This patch doesn't actually make use
of the information, it just makes it available to code generators.

Signed-off-by: Stephen Williams <steve@icarus.com>
2007-10-31 21:39:29 -07:00
Cary R 3258b7726b Pass local scope precision from compiler to vvp/etc.
This patch adds ivl_scope_time_precision() to the compiler which can
be used to extract the local scope precision. tgt-stub and tgt-vvp
have been modified to use this new function and output a value that
is appropriate. The vvp runtime has been altered to use this new
data which is accessed with the vpip_time_precision_from_handle()
function. vpiTimePrecision uses this function to return the correct
precision.
2007-09-28 15:08:02 -07:00
steve d883979fd8 Seperate arrayness from word count 2007-04-02 01:12:34 +00:00
steve fe02214fcc do not calculate nexus name unless needed. 2007-03-26 16:51:48 +00:00
steve fc9a90c9e0 Add support for edge sensitive spec paths. 2007-03-02 06:13:22 +00:00
steve 243cf94165 Add support for conditional specify delay paths. 2007-03-01 06:19:38 +00:00
steve 6f3ddce7c4 Dead code for memories in scopes. 2007-01-17 05:00:12 +00:00
steve f5a7ee0736 Remove dead code related to memories. 2007-01-17 04:39:18 +00:00
steve 91d84e7dc7 Major rework of array handling. Memories are replaced with the
more general concept of arrays. The NetMemory and NetEMemory
 classes are removed from the ivl core program, and the IVL_LPM_RAM
 lpm type is removed from the ivl_target API.
2007-01-16 05:44:14 +00:00
steve 0edb5a7547 Basic support for specify timing. 2006-09-23 04:57:19 +00:00
steve 182734fd4d Remove dead code. 2006-09-20 22:31:23 +00:00
steve fc0695beb6 Handle 64bit delay constants. 2006-08-08 05:11:37 +00:00
steve 80f30be9d0 Add support for system functions in continuous assignments. 2006-06-18 04:15:50 +00:00
steve d434dd7296 Allow part selects of memory words in l-values. 2006-02-02 02:43:57 +00:00
steve 58f182a159 Node delays can be more general expressions in structural contexts. 2006-01-02 05:33:19 +00:00
steve 4a8be3db9c Implement bi-directional part selects. 2005-08-06 17:58:16 +00:00
steve b9799cf6ec Remove NetVariable and ivl_variable_t structures. 2005-07-11 16:56:50 +00:00
steve 75ad90534b Generalize signals to carry types. 2005-07-07 16:22:49 +00:00
steve 4413dd3c81 Fix compile errors. 2005-06-13 23:22:37 +00:00
steve 739a1839ed Do sign extension of structuran nets. 2005-05-24 01:44:27 +00:00
steve 7dd0d255a6 Add support for variable part select. 2005-05-08 23:40:14 +00:00
steve 365cfedd55 Update DFF support to new data flow. 2005-04-24 23:44:01 +00:00
steve 6244dc1194 Make logic aware of strength. 2005-04-13 06:35:11 +00:00
steve 65c7ec00e7 Rework NetRamDq and IVL_LPM_RAM nodes. 2005-04-06 05:29:08 +00:00
steve 236ff2b278 Clean up handle of UDPs. 2005-04-01 06:04:30 +00:00
steve 53da6e9a33 Add support for LPM_UFUNC user defined functions. 2005-03-18 02:56:03 +00:00
steve 1c5b4881d7 Handle case inequality in netlists. 2005-03-09 05:52:03 +00:00
steve 257e1f9516 Support shifts and divide. 2005-02-19 02:43:38 +00:00
steve d74177634c Restructure NetMux devices to pass vectors.
Generate NetMux devices from ternary expressions,
 Reduce NetMux devices to bufif when appropriate.
2005-02-12 06:25:40 +00:00
steve ee5bb5fcaf Add the NetRepeat node, and code generator support. 2005-02-08 00:12:36 +00:00
steve 97f83ffbe3 laborate reduction gates into LPM_RED_ nodes. 2005-02-03 04:56:20 +00:00
steve dfb7c7ba6f Remove the NetEBitSel and combine all bit/part select
behavior into the NetESelect node and IVL_EX_SELECT
 ivl_target expression type.
2005-01-24 05:28:30 +00:00
steve e28636776a Change case compare from logic to an LPM node. 2005-01-22 01:06:55 +00:00
steve 9e94afe399 Use PartSelect/PV and VP to handle part selects through ports. 2005-01-09 20:16:00 +00:00
steve 8f2d679c8a Unify elaboration of l-values for all proceedural assignments,
including assing, cassign and force.

 Generate NetConcat devices for gate outputs that feed into a
 vector results. Use this to hande gate arrays. Also let gate
 arrays handle vectors of gates when the outputs allow for it.
2004-12-29 23:55:43 +00:00
steve 5eb25e44e1 Add ivl_event_scope, and better document ivl_event_X methods. 2004-12-18 18:56:18 +00:00
steve 4444079409 Fixup force statement elaboration. 2004-12-15 17:10:40 +00:00
steve 65e9b6be12 Rework of internals to carry vectors through nexus instead
of single bits. Make the ivl, tgt-vvp and vvp initial changes
 down this path.
2004-12-11 02:31:25 +00:00
steve e4ae832153 Clean up spurious trailing white space. 2004-10-04 01:10:51 +00:00
steve 3dbc07f34d Implement signed divide and signed right shift in nets. 2004-06-30 02:16:26 +00:00
steve e56b77a43f Add support for wait on list of named events. 2003-12-03 02:46:23 +00:00
steve 43f28b53a3 Design::get_flag returns const char* instead of string. 2003-11-10 20:59:03 +00:00
steve 7521aa83f8 Pass FF synchronous set values to code generator. 2003-09-03 23:33:29 +00:00
steve 64d795c53a Preserve variable ranges all the way to the vpi. 2003-08-22 23:14:26 +00:00
steve e561819179 Add synthesis support for synchronous reset. 2003-08-15 02:23:52 +00:00
steve 21ff80075a Various warnings fixed. 2003-06-24 01:38:02 +00:00
steve bad861dba3 Module attributes make it al the way to ivl_target. 2003-06-23 01:25:44 +00:00
steve 2a29c4fd62 Support real expressions in case statements. 2003-05-14 05:26:41 +00:00
steve f1cc9d865b Support event names as expressions elements. 2003-04-22 04:48:29 +00:00
steve 5d1d99a89f Handle signed magnitude compare all the
way through to the vvp code generator.
2003-04-11 05:18:08 +00:00
steve 1222153cdf Keep parameter constants for the ivl_target API. 2003-03-10 23:40:53 +00:00
steve 9c973efa9d Wrong sense of need compared to have. 2003-03-06 04:32:40 +00:00
steve 22d392a75c Obsolete the ivl_event_name function. 2003-03-06 01:24:37 +00:00
steve badad63ab4 All NetObj objects have lex_string base names. 2003-03-06 00:28:41 +00:00
steve 486274cfa1 Scope names stored only as basename. 2003-03-03 02:22:41 +00:00
steve a275133ff9 LPM objects store only their base names. 2003-02-26 01:29:24 +00:00
steve 46253ed873 Rework expression parsing and elaboration to
accommodate real/realtime values and expressions.
2003-01-26 21:15:58 +00:00
steve c2070777b2 The $time system task returns the integer time
scaled to the local units. Change the internal
 implementation of vpiSystemTime the $time functions
 to properly account for this. Also add $simtime
 to get the simulation time.
2002-12-21 00:55:57 +00:00
steve 9ce2806710 Fix synth2 handling of aset/aclr signals where
flip-flops are split by begin-end blocks.
2002-10-23 01:45:24 +00:00
steve 166621bcb3 Generate vvp code for asynch set/reset of NetFF. 2002-09-26 03:18:04 +00:00
steve 52bf4e613f conditional ident string using autoconfig. 2002-08-12 01:34:58 +00:00
steve 14942b4b43 Dead code. 2002-08-07 02:17:14 +00:00
steve 693e9e5ad0 Store only the base name of memories. 2002-08-05 04:18:45 +00:00
steve 301040a67a Avoid emitting to vvp local net symbols. 2002-07-05 21:26:17 +00:00
steve 5eca5d9948 Carry integerness throughout the compilation. 2002-06-21 04:59:35 +00:00
steve 422754f36f Support carrying the scope of named begin-end
blocks down to the code generator, and have
 the vvp code generator use that to support disable.
2002-05-27 00:08:45 +00:00
steve bfad382fd1 Carry Verilog 2001 attributes with processes,
all the way through to the ivl_target API.

 Divide signal reference counts between rval
 and lval references.
2002-05-26 01:39:02 +00:00
steve 700887d657 Verilog 2001 attriubtes on nets/wires. 2002-05-24 04:36:23 +00:00
steve e6c0629626 Add language support for Verilog-2001 attribute
syntax. Hook this support into existing $attribute
 handling, and add number and void value types.

 Add to the ivl_target API new functions for access
 of complex attributes attached to gates.
2002-05-23 03:08:50 +00:00
steve 828ca0ef9d Add API to support user defined function. 2002-03-17 19:30:20 +00:00
steve b7c2bd4f72 Add the NetUserFunc netlist node. 2002-03-09 02:10:22 +00:00
steve 364ffc9024 Add support for bit select of parameters.
This leads to a NetESelect node and the
 vvp code generator to support that.
2002-01-28 00:52:41 +00:00
steve dd79885f6d Add structural modulus support down to vvp. 2002-01-03 04:19:01 +00:00