This patch pushes the non-blocking event control information to
the code generator. It adds the %evctl statements that are used
to put the event control information into the special thread
event control registers. The signed version (%evctl/s) required
the implementation of %ix/getv/s to load a signed value into
an index register. It then adds %assign/wr/e event control based
non-blocking assignment for real values. It also fixes the other
non-blocking real assignments to use Transport instead of inertial
delays.
Nothing to do with tab width! Eliminates useless
trailing spaces and tabs, and nearly all <space><tab>
pairings. No change to derived files (e.g., .vvp),
non-master files (e.g., lxt2_write.c) or the new tgt-vhdl
directory.
Low priority, simple entropy reduction. Please apply
unless it deletes some steganographic content you want
to keep.
This patch pushes the automatic property for both tasks and
functions to the code generators. The vvp back end does not
currently support this so it will error out during code
generation. The VHDL back end should be able to use this
property and tgt-stub prints the property. Having this will
also make it easier when we do adding this to the runtime.
This patch adds .cast/int and updates .cast/real to act as a local
(temporary) net and to support either a signed or unsigned input.
The vvp_vector4_t class not can convert an arbitrarily sized double
to a vector value. This removes the restriction of lround().
Also document the new statements.
This handles the general case of a non-real operand to a real-valued
division. This can turn up if only 1 operand of a divide is real. In
this case the division as a whole is real and the other operand must
be cast to real.
This method creates an extra node, but it should be a very compact
node and this node does no evaluation tricks so in the run time should
be no more expensive then folding the cast into the .arith/div.r itself.
Fold the bi-directional part select into the pass switch (tran) support
so that it can be really bi-directional. This involves adding a new
tranvp device that does part select in tran islands, and reworking the
tran island resolution to handle non-identical nodes. This will be needed
for resistive tran devices anyhow.
NetTran devices must be collected into islands because they are all
a bi-directional mass. This is how vvp will process them and the code
generator will need a head start organizing them.
This involves defining the API for switches and cleaning up the
elaborated form to match the defined ivl_target API. Also add t-dll
code to support the ivl_switch_t functions, and add stub code that
checks the results.
This patch adds file and line information for parameters and
local parameters. It also adds file/line stubs for signals in
the tgt-* files. It adds the pform code needed to eventually
do genvar checks and passing of genvar file/line information.
It verifies that a genvar does not have the same name as a
parameter/local parameter.
In continuous assign expressions, the abs() operator can't easily be
burried in generic unary handling, so add the IVL_LPM_ABS type and
generate it as needed.
This patch adds code to push the file and line information
for scope objects (modules, functions, tasks, etc.) to the
runtime. For modules, this includes the definition fields.
This patch adds ifnone functionality. It does not produce an
error when both an ifnone and an unconditional simple module
path are given. For this case the ifnone delays are ignored.
This patch adds support for delaying constants at time zero. It also
cleans up the code in elab_net.cc to use this capability instead of
building it with an extra BUFZ to carry the delay information.
Previously only the logical operators (~, &, |, ^, etc.) supported a
delayed value in a continuous assignment. This patch should extend this
to all operators. An extensive check of real values was done. The same
will be done shortly for bit based nets.
Checks for constructs currently unsupported in continuous assignments
provide a more explicit message (** operator, real user functions,
{!, && and ||} operators with a real argument).
Rework the ivl_file_table_* interface to be more generic and easier
to use. Also all the vvp examples except for memory.vvp have been
fixed to run correctly with the current vvp. Someone with a bit more
experience will need to fix memory.vvp.
Add the vpiFile and vpiLineNo properties to system functions.
Most other objects have stubs that return "N/A"/0. Interactive
functions (called from the debugger) use <interactive> for the
file name.
Delay paths need a scope. This helps the code generators bind the
modpaths to the correct scope. This patch doesn't actually make use
of the information, it just makes it available to code generators.
Signed-off-by: Stephen Williams <steve@icarus.com>
This patch adds ivl_scope_time_precision() to the compiler which can
be used to extract the local scope precision. tgt-stub and tgt-vvp
have been modified to use this new function and output a value that
is appropriate. The vvp runtime has been altered to use this new
data which is accessed with the vpip_time_precision_from_handle()
function. vpiTimePrecision uses this function to return the correct
precision.
more general concept of arrays. The NetMemory and NetEMemory
classes are removed from the ivl core program, and the IVL_LPM_RAM
lpm type is removed from the ivl_target API.
including assing, cassign and force.
Generate NetConcat devices for gate outputs that feed into a
vector results. Use this to hande gate arrays. Also let gate
arrays handle vectors of gates when the outputs allow for it.
scaled to the local units. Change the internal
implementation of vpiSystemTime the $time functions
to properly account for this. Also add $simtime
to get the simulation time.
syntax. Hook this support into existing $attribute
handling, and add number and void value types.
Add to the ivl_target API new functions for access
of complex attributes attached to gates.