steve
668781788b
Support resistive mos devices.
2005-06-12 15:13:37 +00:00
steve
a59f3b1fa6
Implement nmos and pmos devices.
2005-06-12 00:44:49 +00:00
steve
42433f4df9
Add support for notif0/1 gates.
...
Make delay nodes support inertial delay.
Add the %force/link instruction.
2005-06-02 16:02:11 +00:00
steve
b6fd4f610b
Add a sign-extension node.
2005-05-24 01:43:27 +00:00
steve
ed78c5b677
Force part base out of bounds if index is invalid.
2005-05-09 00:36:58 +00:00
steve
7dd0d255a6
Add support for variable part select.
2005-05-08 23:40:14 +00:00
steve
f6da64e2ec
ostream insert for vvp_vector4_t objects.
2005-05-07 03:14:50 +00:00
steve
e9bf021f6c
vvp_fun_signal eliminates duplicate propagations.
2005-04-25 04:42:17 +00:00
steve
a3f696cd06
Add vvp driver functor for logic outputs,
...
Add ostream output operators for debugging.
2005-04-13 06:34:20 +00:00
steve
fe91ebe77c
Default behavior for recv_vec8 methods.
2005-04-09 05:30:38 +00:00
steve
573e07225d
Rework the vvp_delay_t class.
2005-04-03 05:45:51 +00:00
steve
b7ef2fcb0a
Reimplement combinational UDPs.
2005-04-01 06:02:45 +00:00
steve
53da6e9a33
Add support for LPM_UFUNC user defined functions.
2005-03-18 02:56:03 +00:00
steve
313502f360
Implement VPI access to signal strengths,
...
Fix resolution of ambiguous drive pairs,
Fix spelling of scalar.
2005-03-12 04:27:42 +00:00
steve
c5e7e2ec0a
Signals may receive part vectors from %set/x0
...
instructions. Re-implement the %set/x0 to do
just that. Remove the useless %set/x0/x instruction.
2005-02-14 01:50:23 +00:00
steve
ff067bb959
tri0 and tri1 resolvers must replace HiZ with 0/1 after resolution.
2005-02-13 05:26:30 +00:00
steve
355ead0002
Add debug dumps for vectors, and fix vvp_scaler_t make from BIT4_X values.
2005-02-12 06:13:22 +00:00
steve
ca1bbc79a3
Add .repeat functor and BIFIF functors.
2005-02-07 22:42:42 +00:00
steve
b48abb2148
Add wide .arith/mult, and vvp_vector2_t vectors.
2005-02-04 05:13:02 +00:00
steve
018014368b
Add support for reduction logic gates.
2005-02-03 04:55:13 +00:00
steve
84b3e8e2dc
Get .arith/sub working.
2005-01-30 05:06:49 +00:00
steve
d51503ffd8
move AND to buitin instead of table.
2005-01-29 17:52:06 +00:00
steve
a121e703f3
Add vector4 implementation of .arith/mult.
2005-01-28 05:34:25 +00:00
steve
6a23f16860
.cmp/x supports signed magnitude compare.
2005-01-22 17:36:15 +00:00
steve
1c3668ea7f
Reimplement comparators as vvp_vector4_t nodes.
2005-01-16 04:19:08 +00:00
steve
9735b0e8b3
Add the .part/pv node and related functionality.
2005-01-09 20:11:15 +00:00
steve
d5c33420ab
vvp_fun_signal propagates vvp_vector8_t vectors when appropriate.
2005-01-01 02:12:34 +00:00
steve
34a14b983b
Implement .resolv functors, and stub signals recv_vec8 method.
2004-12-31 06:00:06 +00:00
steve
1674d692b7
Add the part concatenation node (.concat).
...
Add a vvp_event_anyedge class to handle the special
case of .event statements of edge type. This also
frees the posedge/negedge types to handle all 4 inputs.
Implement table functor recv_vec4 method to receive
and process vectors.
2004-12-29 23:45:13 +00:00
steve
36f36bd2ac
Add basic force/release capabilities.
2004-12-15 17:16:08 +00:00
steve
65e9b6be12
Rework of internals to carry vectors through nexus instead
...
of single bits. Make the ivl, tgt-vvp and vvp initial changes
down this path.
2004-12-11 02:31:25 +00:00