2014-07-23 22:39:29 +02:00
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#ifndef IVL_npmos_H
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#define IVL_npmos_H
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2001-10-09 04:28:16 +02:00
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/*
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2025-06-21 19:02:45 +02:00
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* Copyright (c) 2005-2025 Stephen Williams (steve@icarus.com)
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2001-10-09 04:28:16 +02:00
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*
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* This source code is free software; you can redistribute it
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* and/or modify it in source code form under the terms of the GNU
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* General Public License as published by the Free Software
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* Foundation; either version 2 of the License, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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2012-08-29 03:41:23 +02:00
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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2001-10-09 04:28:16 +02:00
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*/
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2005-06-12 02:44:49 +02:00
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# include "vvp_net.h"
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2001-10-09 04:28:16 +02:00
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2005-06-12 02:44:49 +02:00
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/*
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* The vvp_fun_pmos functor is similar to the vvp_fun_bufif. The
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* principle difference is that it has no drive of its own, instead
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* taking drive strength from its data input. In other words, it is
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* not a buffer but a uni-directional switch.
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*
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* The truth table for the PMOS device is:
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*
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* Q = D C (D is port0, C is port1)
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* -------
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* 0 | 0 0
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* Z | 0 1
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* L | 0 x
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* 1 | 1 0
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* Z | 1 1
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* H | 1 x
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*
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* This class also implements the NMOS device, which is the same as
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* the PMOS device, but the Control input inverted. The enable_invert
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2008-06-24 17:46:16 +02:00
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* flag to the constructor activates this inversion.
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2005-06-12 02:44:49 +02:00
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*/
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2001-10-09 04:28:16 +02:00
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2005-06-12 17:13:37 +02:00
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class vvp_fun_pmos_ : public vvp_net_fun_t {
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2001-10-09 04:28:16 +02:00
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public:
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2018-02-23 23:07:59 +01:00
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explicit vvp_fun_pmos_(bool enable_invert, bool resistive);
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2001-10-09 04:28:16 +02:00
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2025-07-22 08:30:57 +02:00
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virtual void recv_vec4(vvp_net_ptr_t port, const vvp_vector4_t&bit,
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vvp_context_t) override;
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virtual void recv_vec4_pv(vvp_net_ptr_t ptr, const vvp_vector4_t&bit,
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unsigned base, unsigned vwid, vvp_context_t ctx) override;
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virtual void recv_vec8_pv(vvp_net_ptr_t ptr, const vvp_vector8_t&bit,
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unsigned base, unsigned vwid) override;
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virtual void recv_real(vvp_net_ptr_t port, double real,
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vvp_context_t ctx) override;
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2016-04-19 00:47:43 +02:00
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2005-06-12 17:13:37 +02:00
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protected:
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2005-06-12 02:44:49 +02:00
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void generate_output_(vvp_net_ptr_t port);
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2001-10-18 19:30:25 +02:00
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2005-06-12 02:44:49 +02:00
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vvp_vector8_t bit_;
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vvp_vector4_t en_;
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2018-02-23 23:07:59 +01:00
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bool inv_en_, resistive_;
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2001-10-18 19:30:25 +02:00
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};
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2005-06-12 17:13:37 +02:00
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class vvp_fun_pmos : public vvp_fun_pmos_ {
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public:
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explicit vvp_fun_pmos(bool enable_invert);
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2025-07-22 08:30:57 +02:00
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virtual void recv_vec8(vvp_net_ptr_t port, const vvp_vector8_t&bit) override;
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2005-06-12 17:13:37 +02:00
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};
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/*
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* The vvp_fun_rpmos is a resistive version of the vvp_fun_pmos. The
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* only difference is that the input strength is reduced as it passes
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* through the device.
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*/
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class vvp_fun_rpmos : public vvp_fun_pmos_ {
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public:
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explicit vvp_fun_rpmos(bool enable_invert);
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2025-07-22 08:30:57 +02:00
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virtual void recv_vec8(vvp_net_ptr_t port, const vvp_vector8_t&bit) override;
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2005-06-12 17:13:37 +02:00
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};
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2001-10-09 04:28:16 +02:00
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/*
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2007-09-07 03:46:22 +02:00
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* The truth table for the CMOS device is:
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2001-10-09 04:28:16 +02:00
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*
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2007-09-07 03:46:22 +02:00
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* Q = D N P (D is port0, N is port1, P is port2)
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* ---------
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* 0 | 0 0 0
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* Z | 0 0 1
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* 0 | 0 1 0
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* 0 | 0 1 1
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* L | 0 0 x
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* L | 0 x 1
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* L | 0 x x
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* 1 | 1 0 0
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* Z | 1 0 1
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* 1 | 1 1 0
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* 1 | 1 1 1
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* H | 1 0 x
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* H | 1 x 1
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* H | 1 x x
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2001-10-09 04:28:16 +02:00
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*/
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2007-09-07 03:46:22 +02:00
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class vvp_fun_cmos_ : public vvp_net_fun_t {
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public:
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2018-02-23 23:07:59 +01:00
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explicit vvp_fun_cmos_(bool resistive);
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2007-09-07 03:46:22 +02:00
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2025-07-22 08:30:57 +02:00
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virtual void recv_vec4(vvp_net_ptr_t port, const vvp_vector4_t&bit,
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vvp_context_t) override;
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virtual void recv_vec4_pv(vvp_net_ptr_t ptr, const vvp_vector4_t&bit,
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unsigned base, unsigned vwid, vvp_context_t ctx) override;
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virtual void recv_vec8_pv(vvp_net_ptr_t ptr, const vvp_vector8_t&bit,
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unsigned base, unsigned vwid) override;
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virtual void recv_real(vvp_net_ptr_t port, double real,
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vvp_context_t) override;
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2016-04-19 00:47:43 +02:00
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2007-09-07 03:46:22 +02:00
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protected:
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void generate_output_(vvp_net_ptr_t port);
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vvp_vector8_t bit_;
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vvp_vector4_t n_en_;
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vvp_vector4_t p_en_;
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2018-02-23 23:07:59 +01:00
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bool resistive_;
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2007-09-07 03:46:22 +02:00
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};
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class vvp_fun_cmos : public vvp_fun_cmos_ {
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public:
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explicit vvp_fun_cmos();
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2025-07-22 08:30:57 +02:00
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virtual void recv_vec8(vvp_net_ptr_t port, const vvp_vector8_t&bit) override;
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2007-09-07 03:46:22 +02:00
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};
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class vvp_fun_rcmos : public vvp_fun_cmos_ {
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public:
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explicit vvp_fun_rcmos();
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2025-07-22 08:30:57 +02:00
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virtual void recv_vec8(vvp_net_ptr_t port, const vvp_vector8_t&bit) override;
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2007-09-07 03:46:22 +02:00
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};
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2014-07-23 22:39:29 +02:00
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#endif /* IVL_npmos_H */
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