luke
/
abc
mirror of https://github.com/YosysHQ/abc.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity
1,475 Commits 27 Branches 57 Tags 58 MiB
Commit Graph

181 Commits

Author SHA1 Message Date
Alan Mishchenko 6b96d9a84e Integrating GIA with LUT mapping. 2012-10-24 17:39:38 -07:00
Alan Mishchenko 4ed89d00fe Making explicit cast to 64-bit unsigned in a few places. 2012-10-09 09:23:08 -07:00
Alan Mishchenko 11c5c81037 New AIG optimization package. 2012-10-06 18:33:54 -07:00
Alan Mishchenko dc9a22582a New AIG optimization package. 2012-10-06 16:11:08 -07:00
Alan Mishchenko 3d23bc8c57 New AIG optimization package. 2012-10-06 16:02:36 -07:00
Alan Mishchenko 4637097491 New AIG optimization package. 2012-10-06 15:12:39 -07:00
Alan Mishchenko ad8a3f5159 New AIG optimization package. 2012-10-06 15:09:00 -07:00
Alan Mishchenko 8f504907ee Bug fix in XOR balancing (command 'balance -x'). 2012-10-05 15:02:26 -07:00
Alan Mishchenko aa705a9af6 Renamed reference counting APIs in GIA package. 2012-10-02 20:20:46 -07:00
Alan Mishchenko 71bdfae941 Replacing 'st_table' by 'st__table' to resolve linker problems. 2012-09-29 17:11:03 -04:00
Alan Mishchenko 6e774ef541 Cleaing AIG manager by removing pointers to HAIG. 2012-09-23 12:01:59 -07:00
Alan Mishchenko fdd043ca34 Upgrading hierarchy timing manager. 2012-09-21 22:00:39 -07:00
Alan Mishchenko 69bbfa9856 Created new abstraction package from the code that was all over the place. 2012-09-15 23:27:46 -07:00
Alan Mishchenko 05f51cbb2a Enabled recording the name of the file GIA is coming from. 2012-09-04 13:52:42 -07:00
Alan Mishchenko 6814c48bb4 Added an API to convert a multi-output PLA into a shared AIG. 2012-08-29 12:43:55 -07:00
Alan Mishchenko 942600414d Added simulation of comb circuits with user-specified patterns in command 'sim'. 2012-08-24 11:12:51 -07:00
Alan Mishchenko 908d5e696c Replacing Mb/Gb to be MB/GB. 2012-07-09 22:57:03 -07:00
Alan Mishchenko 1c33107cbb Updating project settings to have simpler include paths. 2012-07-07 20:14:12 -07:00
Alan Mishchenko ea98a2497e Fixing time primtouts throughout the code. 2012-07-07 18:41:02 -07:00
Alan Mishchenko 4760983a46 Fixing time primtouts throughout the code. 2012-07-07 18:15:08 -07:00
Alan Mishchenko 3aab724573 Fixing time primtouts throughout the code. 2012-07-07 17:46:54 -07:00
Alan Mishchenko e22f5d1246 Bug fix in &gla_refine. 2012-07-07 13:21:54 -07:00
Alan Mishchenko 9ebcd9eca9 Various changes to enable sensitization-based refinement in &gla. 2012-07-04 14:53:07 -07:00
Alan Mishchenko 32217230b0 Performance improvement in &gla_refine. 2012-07-03 11:17:04 -07:00
Alan Mishchenko 8765502ef8 Other improvements to bmc2 and bmc3. 2012-07-01 14:57:05 -07:00
Alan Mishchenko 99c4a1be5f Bug fix in &gla_refine. 2012-06-29 13:06:22 -07:00
Alan Mishchenko 7629fd6aea Added min-cut-based refinement of gate-level abstraction (command &gla_refine). 2012-06-24 18:45:42 -07:00
Alan Mishchenko c6af9094c0 Changing 'if' to allow for delay optimization on sequential paths only. 2012-05-20 17:27:53 +07:00
Alan Mishchenko c2ab4426e4 Important bug fix in XOR balancing (balance -x). 2012-03-26 15:01:54 -07:00
Alan Mishchenko 16cf6bf1ca Logic sharing for multi-input gates. 2012-03-26 12:55:20 -07:00
Alan Mishchenko fec988f619 Renamed Aig_ObjPioNum to be Aig_ObjCioId. 2012-03-09 19:59:35 -08:00
Alan Mishchenko c46c957a07 Renamed Aig_ObjIsPi/Po to be ...Ci/Co and Aig_Man(Pi/Po)Num to be ...(Ci/Co)... 2012-03-09 19:50:18 -08:00
Alan Mishchenko 2c8f1a67ec Renamed Aig_ManForEachPi/Po to be ...Ci/Co and Aig_ObjCreatePi/Po to be ...Ci/Co. 2012-03-09 19:32:44 -08:00
Alan Mishchenko 97856d021a Silencing some of the gcc warnings. 2012-02-16 23:40:23 -08:00
Alan Mishchenko 791b107e7a Silencing some of the gcc warnings. 2012-02-16 21:53:16 -08:00
Alan Mishchenko 8014f25f6d Major restructuring of the code. 2012-01-21 04:30:10 -08:00
Alan Mishchenko 10ad89490a Bug fix related to not properly resizing SAT solver's model array. 2012-01-06 11:34:06 +07:00
Alan Mishchenko 4a7ef41db2 Adding switch '-W' to fx to control the quality of extracted divisors. 2011-12-15 15:46:32 -08:00
Alan Mishchenko 2bb95a97d0 Adding switch '-W' to fx to control the quality of extracted divisors. 2011-12-15 15:44:56 -08:00
Alan Mishchenko cd2f13c09d Making computation in 'fx' run-to-run reproducible. 2011-11-12 22:20:26 -08:00
Alan Mishchenko 820a147ef1 Removed useless typecasts related to changes in Vec_VecEntry(). 2011-08-01 12:35:34 +07:00
Alan Mishchenko 701296451e Determine LUT size form the LUT library if present. 2011-07-27 13:30:17 +07:00
Alan Mishchenko 6c01e8b9f0 Fixed a number of small bugs and memory leaks. 2011-03-27 14:17:12 -07:00
Alan Mishchenko 4dcf8cee2d Improvements in Vec_Vec_t. 2011-03-27 11:35:31 -07:00
Alan Mishchenko a4aaf110ad Exploration of Sasao's decomposition and minor improvements. 2011-03-11 20:18:02 -08:00
Alan Mishchenko 148a786b69 Made abc.h independent of CUDD and Extra. 2011-03-03 12:28:52 -08:00
Alan Mishchenko ae4b51351c Cumulative changes in the last few weeks. 2011-01-13 12:38:59 -08:00
Alan Mishchenko a17a4e5ca4 NPN class computation. 2010-11-28 22:30:15 -08:00
Alan Mishchenko 6130e39b18 initial commit of public abc 2010-11-01 01:35:04 -07:00
Alan Mishchenko 51a646a355 Version abc90901 
committer: Baruch Sterin <baruchs@gmail.com>
 2015-06-22 23:05:13 -07:00