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959 Commits 27 Branches 57 Tags 58 MiB
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959 Commits

Author SHA1 Message Date
Alan Mishchenko e908ff1cb9 Improving printouts of critical path. 2012-04-09 11:46:42 -07:00
Alan Mishchenko d898059460 Added dumping abstracted model in &vta. 2012-04-07 18:38:20 -07:00
Alan Mishchenko 48b47300e3 Added dumping abstracted model in &vta. 2012-04-07 12:43:17 -07:00
Alan Mishchenko c3d3ccf349 Better interface with the new code. 2012-04-06 22:03:00 -07:00
Alan Mishchenko 2c21e2de0d Improving printouts of critical path. 2012-04-06 13:31:03 -07:00
Alan Mishchenko 5de8e60b9f Improving printouts of critical path. 2012-04-06 12:52:26 -07:00
Alan Mishchenko 8c1513dfbc Improving printouts of critical path. 2012-04-06 00:45:58 -07:00
Alan Mishchenko 993c2027d8 Added several new APIs. 2012-03-31 16:33:22 -07:00
Alan Mishchenko 9520736621 Added several new APIs to GIA and for file management. 2012-03-30 21:09:08 -07:00
Alan Mishchenko 9eb1be8e53 Bug fix in 'addbuffs'. 2012-03-29 15:48:45 -07:00
Alan Mishchenko 38494b41a6 Moving Vec_Set_t to the vector directory. 2012-03-28 10:19:12 -07:00
Alan Mishchenko 265e3e5cd4 Moving Vec_Set_t to the vector directory. 2012-03-28 10:13:42 -07:00
Alan Mishchenko 3992e344ea Logic sharing for multi-input gates (silencing a warning). 2012-03-27 21:59:13 -07:00
Alan Mishchenko a21f2986aa Enabling mapping into multi-input AND/OR gates. 2012-03-27 20:15:02 -07:00
Alan Mishchenko 08253a50eb Logic sharing for multi-input gates (bug fix). 2012-03-26 20:21:05 -07:00
Alan Mishchenko c2ab4426e4 Important bug fix in XOR balancing (balance -x). 2012-03-26 15:01:54 -07:00
Alan Mishchenko a4144cf0d1 Making demiter dump files in the current directory. 2012-03-26 12:55:58 -07:00
Alan Mishchenko 16cf6bf1ca Logic sharing for multi-input gates. 2012-03-26 12:55:20 -07:00
Alan Mishchenko 45f07795ef Logic sharing for multi-input gates. 2012-03-25 23:10:35 -07:00
Alan Mishchenko 8ed3e40a52 Logic sharing for multi-input gates. 2012-03-25 22:47:08 -07:00
Alan Mishchenko 5f075adc19 Logic sharing for multi-input gates. 2012-03-25 16:58:40 -07:00
Alan Mishchenko b4df114e4a Logic sharing for multi-input gates. 2012-03-25 16:49:29 -07:00
Alan Mishchenko 309bcf2dec Logic sharing for multi-input gates. 2012-03-25 01:24:26 -07:00
Alan Mishchenko abb889fe6e Improving printouts of gates and support. 2012-03-24 13:15:37 -07:00
Alan Mishchenko b584fea24a Bug fix in the mapper: using an object after it is deleted. 2012-03-24 11:52:13 -07:00
Alan Mishchenko aede5026b3 Silencing a gcc warning. 2012-03-23 22:55:45 -07:00
Alan Mishchenko 3abd9773a4 Enabled demitering dual-output miters. 2012-03-23 22:52:30 -07:00
Alan Mishchenko 1c31dbe786 Added command 'addbuffs' to create balanced CI/CO paths. 2012-03-23 22:29:25 -07:00
Alan Mishchenko 0792ab0eb6 Additional features for delay optimization 2012-03-21 23:19:49 -07:00
Alan Mishchenko f50ce3dbd9 Switching to a variable-page-size memory manager for clauses and proofs. 2012-03-21 17:13:39 -07:00
Alan Mishchenko 92539a91a0 Added one currently unused iterator. 2012-03-21 15:27:47 -07:00
Alan Mishchenko 0dc699f777 Preventing gcc compilation errors in handling memory pages. 2012-03-21 15:26:09 -07:00
Alan Mishchenko 8f91b30a67 Bug fix to prevent crashing when Abc_Print() is called while ABC is not initialized. 2012-03-20 09:35:33 -07:00
Alan Mishchenko c347f2b90b Alternative way of computing delay in SOP balancing. 2012-03-16 15:43:08 -07:00
Alan Mishchenko aeedc6ace5 Exploration of ISO and minor changes. 2012-03-13 16:12:16 -07:00
Alan Mishchenko 49c13f4f03 Added new procedures to read files. 2012-03-11 23:07:27 -07:00
Alan Mishchenko 795b5a6ce7 Added command 'nodedup' to duplicate nodes with high fanout. 2012-03-11 23:06:14 -07:00
Alan Mishchenko 2e97ffdd1a Updating &test to call full check. 2012-03-10 21:44:32 -08:00
Alan Mishchenko 7d62ef8fae Renamed Aig_ObjIsPi/Po to be ...Ci/Co and Aig_Man(Pi/Po)Num to be ...(Ci/Co)... 2012-03-10 12:09:48 -08:00
Alan Mishchenko fec988f619 Renamed Aig_ObjPioNum to be Aig_ObjCioId. 2012-03-09 19:59:35 -08:00
Alan Mishchenko c46c957a07 Renamed Aig_ObjIsPi/Po to be ...Ci/Co and Aig_Man(Pi/Po)Num to be ...(Ci/Co)... 2012-03-09 19:50:18 -08:00
Alan Mishchenko 2c8f1a67ec Renamed Aig_ManForEachPi/Po to be ...Ci/Co and Aig_ObjCreatePi/Po to be ...Ci/Co. 2012-03-09 19:32:44 -08:00
Alan Mishchenko 34078de8d6 Silencing remaining gcc warnings. 2012-03-09 19:18:18 -08:00
Alan Mishchenko 66eb3cf472 Silencing remaining gcc warnings. 2012-03-09 19:08:34 -08:00
Alan Mishchenko 8388f065f4 Do not cancel the current abstraction when a new refinement is discovered in VTA. 2012-03-09 18:57:13 -08:00
Alan Mishchenko 76f3e03cc1 Commenting out verbose statements. 2012-03-08 02:10:20 +01:00
Alan Mishchenko 3634f60d7a Fixing a bug and adding verification of minimized counter-example. 2012-03-06 15:33:16 +01:00
Alan Mishchenko abde9fe948 Fixing a bug and adding verification of minimized counter-example. 2012-03-06 15:30:20 +01:00
Alan Mishchenko f7c7cb5c65 Adding switch '-n' to 'permute' to derive random topological ordering of internal nodes. 2012-03-06 11:53:07 +01:00
Alan Mishchenko 5ad0fea606 Extending memory page size for proof logging. 2012-03-05 09:01:50 +01:00