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2,451 Commits 27 Branches 57 Tags 58 MiB
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1236 Commits

Author SHA1 Message Date
Alan Mishchenko 68587eb467 Improving switching activity computation. 2013-12-30 15:15:43 +07:00
Alan Mishchenko 07bb26ba08 Improving switching activity computation. 2013-12-30 14:47:07 +07:00
Alan Mishchenko 737e4671ce Adding check for the presence of precomputed data. 2013-12-29 14:39:25 +07:00
Alan Mishchenko 227963f03d New command &write_cnf. 2013-12-18 00:22:26 +07:00
Baruch Sterin c5a0ce9063 add a new command line option to ABC, -q, same as -c, but without echoing the command 2013-12-07 00:44:57 -08:00
Alan Mishchenko 539f05c09f Upgrading command 'print_supp'. 2013-12-04 00:18:07 -08:00
Alan Mishchenko 681483c904 Bug fixes in the above patches. 2013-12-03 00:38:37 -08:00
Alan Mishchenko 34ab59574e Suggested patch of AIG writers. 2013-12-03 00:26:43 -08:00
Alan Mishchenko c8f341fd01 Patching ABC for Yosys. 2013-11-27 19:02:52 -08:00
Alan Mishchenko 55ba5a3e4c Patching ABC for Yosys. 2013-11-27 18:53:22 -08:00
Alan Mishchenko 9cbba3cce7 Patching ABC for Yosys. 2013-11-27 12:28:30 -08:00
Alan Mishchenko e73e5438ca Patching ABC for Yosys. 2013-11-27 12:17:00 -08:00
Alan Mishchenko ee50e84e57 Structural mapper into structures. 2013-11-26 23:19:22 -08:00
Alan Mishchenko 71166f602a Structural mapper into structures. 2013-11-24 21:21:01 -08:00
Alan Mishchenko 9de629ff59 Add command 'splitsop' to split large node SOPs into smaller ones. 2013-11-23 19:52:00 -08:00
Alan Mishchenko 00efa68053 Several changes to allow Liberty files without delay info. 2013-11-21 12:58:13 -08:00
Alan Mishchenko b21447b6df Bug fix in writing constants in write_verilog. 2013-11-21 11:39:57 -08:00
Alan Mishchenko a4325272c2 Adding switch to control the number of nodes tried in mfs2. 2013-11-14 23:50:17 -08:00
Alan Mishchenko 4e00ec6169 Structural mapper into structures. 2013-11-12 16:03:18 -08:00
Alan Mishchenko e70adbcd2d Improvements to the standard cell flow. 2013-11-08 15:16:13 -08:00
Alan Mishchenko 4774dc56fe Fixing the wire-load approximation problem. 2013-11-07 10:24:47 -08:00
Alan Mishchenko 66b6593513 Specialized inductive check. 2013-11-05 19:37:46 -08:00
Alan Mishchenko 053c9f54e4 Tuning for multi-ouptut solver. 2013-11-05 11:25:05 -08:00
Alan Mishchenko 5dce71d57a Tuning for multi-ouptut solver. 2013-11-04 22:46:10 -08:00
Alan Mishchenko a1d2ba0fcc Tuning for multi-ouptut solver. 2013-11-04 22:30:27 -08:00
Alan Mishchenko a564e2ab81 Sweeper internal verification and new switch for &cfraig. 2013-11-01 13:36:51 -04:00
Alan Mishchenko 3b8095a671 Sweeper condition complement bug-fix and code for internal verification. 2013-11-01 12:11:46 -04:00
Alan Mishchenko ec298486b6 False path detection. 2013-10-31 23:42:06 -04:00
Alan Mishchenko 34366b8aca Specialized induction check. 2013-10-31 20:30:40 -04:00
Alan Mishchenko 313caa456a False path detection. 2013-10-31 16:36:08 -04:00
Alan Mishchenko 6582e10a82 Specialized induction check. 2013-10-31 14:18:31 -04:00
Alan Mishchenko f620a857d3 Specialized induction check. 2013-10-31 13:07:43 -04:00
Alan Mishchenko b259a62d40 Compiler warnings. 2013-10-30 13:52:26 -04:00
Alan Mishchenko 2b85ef06e5 Compiler warnings. 2013-10-30 13:45:00 -04:00
Alan Mishchenko 80f46fa2ae Compiler warnings. 2013-10-30 10:29:44 -04:00
Alan Mishchenko e3f9ad3c97 New BMC engine. 2013-10-27 22:55:23 -07:00
Alan Mishchenko d65d8528b6 New BMC engine. 2013-10-27 22:39:58 -07:00
Alan Mishchenko 3b30fb2a11 Multi-output property solver. 2013-10-26 23:05:13 -07:00
Alan Mishchenko 9437664596 Multi-output property solver. 2013-10-26 21:29:57 -07:00
Alan Mishchenko 47afd0f4f4 Multi-output property solver. 2013-10-23 16:26:13 -07:00
Alan Mishchenko 8ad1729aa9 Adding new synthesis scripts. 2013-10-23 10:44:11 -07:00
Alan Mishchenko cb4631e64e Compiler warnings. 2013-10-17 18:04:07 -07:00
Alan Mishchenko 4ab7905b72 Fix for writing choices into a BLIF file. 2013-10-16 13:33:51 -07:00
Alan Mishchenko f9900a4c3b Adding switch 'pdr -i' to start push_clauses from an intermediate timeframe. 2013-10-15 09:04:27 -07:00
Alan Mishchenko 1692c1a57a Improvements to buffering and sizing. 2013-10-13 23:08:52 -07:00
Alan Mishchenko f8410b532b Improvements to buffering and sizing. 2013-10-12 22:51:43 -07:00
Alan Mishchenko 2c7f39026a Extending truth table support in &jf for more than 6 inputs. 2013-10-10 14:45:19 -07:00
Alan Mishchenko 33695bed11 Improvements to the canonical form computation. 2013-10-10 12:35:27 -07:00
Alan Mishchenko 12aab154c3 CNF generating using new mapper. 2013-10-10 01:18:15 -07:00
Alan Mishchenko 6ea3a35b03 Upgrading 'mfs2' to consider some nodes as having no level. 2013-10-09 22:30:38 -07:00
Alan Mishchenko 7d56aabab6 Upgrading 'mfs2' to consider some nodes as having no level. 2013-10-09 22:30:03 -07:00
Alan Mishchenko 608fe4e3bd Towards better Boolean matching. 2013-10-09 21:31:57 -07:00
Alan Mishchenko 51fb9e4ed4 Towards better Boolean matching. 2013-10-09 18:58:49 -07:00
Alan Mishchenko 8a03e530c2 Resubstitution code. 2013-10-06 15:57:17 -07:00
Alan Mishchenko a4a1053d98 Towards better Boolean matching. 2013-10-05 22:44:02 -07:00
Alan Mishchenko c59121f4e0 Bug fix and performance improvement in &iso. 2013-10-03 16:33:41 -07:00
Alan Mishchenko 6132d7cb10 Experiment with the AIG package. 2013-10-03 12:25:27 -07:00
Alan Mishchenko cfa7be1a07 Integrating synthesis into the new BMC engine. 2013-10-02 22:58:23 -07:00
Alan Mishchenko 38e577f5df Enabling counter-example generation in the new BMC engine. 2013-10-02 21:41:01 -07:00
Alan Mishchenko 7b99370e0a Changing default values. 2013-10-02 14:36:33 -07:00
Alan Mishchenko 19c361e387 Changes in specialized matching. 2013-10-02 12:55:20 -07:00
Alan Mishchenko 16f7903697 Changes in specialized matching. 2013-10-01 00:43:43 -07:00
Alan Mishchenko 1fb7ef8153 Converting mapped AIG into strashed AIG. 2013-09-30 22:41:55 -07:00
Alan Mishchenko cb845d4488 Changing default values. 2013-09-30 13:39:14 -07:00
Alan Mishchenko 846da1d2c7 Changing default values. 2013-09-30 13:33:39 -07:00
Alan Mishchenko 726e70392c Changing default values. 2013-09-30 01:00:25 -07:00
Alan Mishchenko 62439be84d New logic sharing extraction. 2013-09-29 23:14:00 -07:00
Alan Mishchenko 2a83a97164 Changing default values. 2013-09-28 23:56:08 -07:00
Alan Mishchenko 797cb49584 Changing default values. 2013-09-28 23:14:43 -07:00
Alan Mishchenko 68011de615 Improving printouts in sharing extraction. 2013-09-28 22:42:01 -07:00
Alan Mishchenko 5f97f5cffa New logic sharing extraction. 2013-09-28 20:19:53 -07:00
Alan Mishchenko 61ee156b72 New logic sharing extraction. 2013-09-28 18:35:38 -07:00
Alan Mishchenko a7fcdf20ab Performance balancing command &b. 2013-09-27 18:50:23 -07:00
Alan Mishchenko 4a74b7ced9 Generation of plain AIG after mapping. 2013-09-27 14:45:55 -07:00
Alan Mishchenko 940cf7f98b Generation of plain AIG after mapping. 2013-09-27 13:30:36 -07:00
Alan Mishchenko debbf4d807 Bug fix. 2013-09-27 10:09:57 -07:00
Alan Mishchenko 531657105b Improving DAG-aware unmapping. 2013-09-25 15:29:01 -07:00
Alan Mishchenko ee11ee1833 Changes to enable decomposition of non-DSD functions. 2013-09-25 13:18:21 -07:00
Alan Mishchenko cab8301065 Changing switch -R <num> in &gla to mean the max allowed size of abstraction. Adding switch -Q <num> to stop when the number of objects exceeds num % _during_refinement_. 2013-09-23 10:57:15 -07:00
Alan Mishchenko eec94a70f1 Adding API to return the mapped network. 2013-09-22 23:18:40 -07:00
Alan Mishchenko d61bedc627 Adding API to return the mapped network. 2013-09-22 16:23:57 -07:00
Alan Mishchenko cfebcae125 Adding resource limit to stop &gla when the number of remaining objects is less than R/2 during refinement. 2013-09-21 17:55:59 -04:00
Alan Mishchenko d4bd7846c3 Added bridge integration for multi-output 'bmc3 -a'. 2013-09-17 23:19:54 -07:00
Alan Mishchenko efa6b54b5e Debugging and finetuning the flow. 2013-09-17 21:47:39 -07:00
Alan Mishchenko 73a997a8bd Adding commands to set and print timing constraints. 2013-09-17 14:47:34 -07:00
Alan Mishchenko 7d3976a763 Unifying standard cell library representations. 2013-09-17 13:16:20 -07:00
Alan Mishchenko 105648bf7c Adding switch to enable reuse of proof-obligations in the last timeframe. 2013-09-16 22:57:50 -07:00
Alan Mishchenko 2ba12a76ff Adding new switch to &if to relax the delay. 2013-09-16 22:50:39 -07:00
Alan Mishchenko 653dc8cff5 Added bridge integration for multi-output 'pdr -a'. 2013-09-16 14:46:07 -07:00
Alan Mishchenko 3b1cf0976c Added bridge integration for multi-output 'pdr -a'. 2013-09-16 14:39:37 -07:00
Alan Mishchenko ff5d3591d1 Infrastructure to support full Liberty format and unitification of library representations. 2013-09-15 18:23:49 -07:00
Alan Mishchenko a4087e45f0 Enabling additional printouts in 'pdr'. 2013-09-13 17:36:29 -07:00
Alan Mishchenko 27be3d0185 Added command &struct for profiling non-dec structures. 2013-09-13 17:25:31 -07:00
Alan Mishchenko dfb43b2f58 Fix a bug in 'zeropo'. 2013-09-13 09:52:54 -07:00
Alan Mishchenko 7312ff3c4a Improvements to the new technology mapper. 2013-09-12 23:14:39 -07:00
Alan Mishchenko 75fee10708 Improvements to the new technology mapper. 2013-09-12 22:37:26 -07:00
Alan Mishchenko 14606c473e Improvements to the new technology mapper. 2013-09-12 17:53:41 -07:00
Alan Mishchenko b1b0202c05 Command '&slice' to cut out the bottom part of the AIG. 2013-09-11 14:38:08 -07:00
Alan Mishchenko 66b1d4de54 Small performance bug in new 'fx'. 2013-09-11 13:10:31 -07:00
Alan Mishchenko 0e256dc2c2 Updates for the new BMC engine. 2013-09-10 22:12:42 -07:00