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abc
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4,839 Commits 27 Branches 57 Tags 58 MiB
Commit Graph

219 Commits

Author SHA1 Message Date
Alan Mishchenko de71e5f610 Passing node labels. 2021-04-26 18:52:44 -07:00
Alan Mishchenko 35c2b42164 Adding switch -o to 'map' and '&put' to control gate duplication. 2019-10-26 14:07:52 +03:00
Alan Mishchenko 0e78722419 Making 'dsec' return correct return value (undoing this change, made by mistake). 2019-06-26 15:37:55 +03:00
Alan Mishchenko 05322e0446 Making 'dsec' return correct return value. 2019-06-24 11:37:27 +02:00
Alan Mishchenko 26ac9ef91a Making 'dsec' return verification status. 2019-06-21 08:03:49 +02:00
Alan Mishchenko bfefe96cad Adding clock enable extraction as command &put -e. 2019-04-14 13:13:03 -07:00
Alan Mishchenko 2feb5da23c Compiler warning. 2019-03-28 07:52:45 -07:00
Alan Mishchenko a176485a9e Changing print-out in 'dprove' when the miter is combinational. 2019-03-27 14:44:43 -07:00
Alan Mishchenko ecae67e3bf Several changes to various packages. 2017-09-04 15:57:00 -07:00
Alan Mishchenko 23d36a8d56 Integrating Satoko into 'bmc' and 'bmc2'. 2017-08-16 14:20:52 +07:00
Alan Mishchenko cf539dcca4 Fix mismatch in output formatting. 2017-01-21 12:48:40 +08:00
Alan Mishchenko 3712dd30d0 Changes for delay-oriented computation. 2015-10-23 15:14:31 -07:00
Alan Mishchenko 4f74e00470 More tuning in &nf. 2015-08-28 19:17:48 -07:00
Alan Mishchenko 9ef96ae8a6 Changes to be able to compile ABC without CUDD. 2015-08-24 20:55:07 -07:00
Alan Mishchenko 99e3e3bc7e Changes to be able to compile ABC without CUDD. 2015-08-24 20:21:30 -07:00
Alan Mishchenko a90700c753 Correcting assert in converting standard cell mapping from GIA into ABC. 2015-04-27 23:06:39 -07:00
Alan Mishchenko 53e4946c43 Trying to reduce delay degradation afer 'map' with user timing. 2015-03-24 19:24:52 +07:00
Alan Mishchenko 7b1c25086b Improvements and tuning of CBA. 2015-02-01 20:50:59 -08:00
Alan Mishchenko 14425c111e Organizing commands for barbuf-aware flow. 2015-01-20 21:20:31 -08:00
Alan Mishchenko ac7633c5a4 Integrating barrier buffers. 2014-12-11 11:14:04 -08:00
Alan Mishchenko 4f940de518 Converting AIG with MUXes into a logic network. 2014-12-10 22:52:34 -08:00
Alan Mishchenko 1398de7c46 Integrating barrier buffers. 2014-12-08 14:10:41 -08:00
Alan Mishchenko b4cf2f7448 Added switches '-c' and '-n' to 'init'. 2014-11-02 17:35:47 -08:00
Alan Mishchenko 7fb1954268 Small changes. 2014-07-29 22:49:10 -07:00
Alan Mishchenko 6a69a9139c Adding support for standard-cell mapping. 2014-07-28 11:31:31 -07:00
Alan Mishchenko 44d9c7e543 Improvements to CNF generation. 2014-06-23 13:11:59 -07:00
Jiang Long 574af21208 merge unfold2 2014-06-04 21:59:03 -07:00
Alan Mishchenko 4bafc98aba Pass file name correctly. 2014-04-10 15:44:26 -07:00
Alan Mishchenko 473c584563 Mismatch in bmc3 printout. 2014-03-30 14:21:23 -07:00
Alan Mishchenko a1cdcb0b43 Updating code to support barrier buffers. 2014-03-18 17:50:53 -07:00
Alan Mishchenko 12c8a54cff Adding barrier buffers. 2014-03-16 22:12:17 -07:00
Alan Mishchenko 3b30fb2a11 Multi-output property solver. 2013-10-26 23:05:13 -07:00
Alan Mishchenko 47afd0f4f4 Multi-output property solver. 2013-10-23 16:26:13 -07:00
Alan Mishchenko e2f11e14d0 Adding switch &get -m to import mapped network into the &-space. 2013-09-01 19:34:32 -07:00
Alan Mishchenko 8c7ca72ea9 Adding timeout to command 'ind'. 2013-06-28 12:21:48 -07:00
Alan Mishchenko a66dc0afb6 Unifying representation of mapping in GIA. 2013-06-25 23:05:51 -07:00
Alan Mishchenko 19c25fd6aa Adding a wrapper around clock() for more accurate time counting in ABC. 2013-05-27 15:09:23 -07:00
Alan Mishchenko 50095be5ac Adding runtime limit per output to multi-output DPR (pdr -H <num_sec>). 2013-05-03 19:58:25 -07:00
Alan Mishchenko 7808ee8e70 Adding parameter structure for rarity simulation. 2013-04-17 19:40:02 -07:00
Alan Mishchenko 48fce79453 Updating 'sim3' to move the design into the last rare state. 2013-04-01 18:39:42 -07:00
Alan Mishchenko 7a2132b237 Added dumping QDIMACS files in command 'qbf'. 2013-03-27 17:21:08 -07:00
Alan Mishchenko 91ca83e864 Adding new features to 'dualrail'. 2013-02-21 22:51:25 -08:00
Alan Mishchenko dfe5f511b2 Adding new features to 'dualrail'. 2013-02-21 22:46:53 -08:00
Alan Mishchenko fd0ff0171e Added 'gap timeout' to bmc3 and sim3. 2013-02-15 16:47:18 -08:00
Alan Mishchenko 6863688789 Enabled detecting CEXes in multiple POs without stopping (sim3 -a). 2013-01-23 12:37:44 +07:00
Alan Mishchenko ac1207abea Enabled detecting CEXes in multiple POs without stopping (sim3 -a). 2013-01-23 02:07:50 +07:00
Alan Mishchenko a8dad4ed61 Fixing C++ compilation issues. 2013-01-08 13:12:28 +08:00
Alan Mishchenko 8355eb1d41 Enabling multi-output solving in 'pdr'. 2012-12-09 17:52:34 -08:00
Alan Mishchenko ce63869fe7 Enabling multi-output solving in 'pdr'. 2012-12-09 17:33:44 -08:00
Alan Mishchenko 9fc1cd0b3f Enabling multi-output solving in 'pdr'. 2012-12-09 15:12:40 -08:00