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Commit Graph

107 Commits

Author SHA1 Message Date
Alan Mishchenko 07d074fd88 New feature for area minimization in standard cell mapping. 2016-05-19 15:22:25 -07:00
Alan Mishchenko 7c089a3ac6 Factoring out library preprocessing code in &nf and putting it elsewhere. 2016-05-16 16:50:01 -07:00
Alan Mishchenko 20a2b0a0f2 Added switch 'read_genlib -n' to anonymize Genlib library. 2016-05-16 15:44:54 -07:00
Alan Mishchenko 22a5ab19c8 Adding API to convert Genlib into a simple Liberty. 2016-03-11 00:15:13 +09:00
Alan Mishchenko 5a47990043 Disabling formula cleaner to avoid problems with reading GENLIB on some libraries. 2016-02-21 18:15:05 -08:00
Alan Mishchenko 59aea7639f Bug fix in liberty parser and change suggested by Clifford. 2016-02-07 12:54:13 -08:00
Alan Mishchenko 355865e81b GENLIB parsing bug, which led to a crash. 2016-02-06 12:07:42 -08:00
Alan Mishchenko a4f9776388 Consolidating timing manager Scl_Con_t and propagating changes. 2016-01-07 16:50:01 -08:00
Alan Mishchenko c158dd5a94 Migrating to using 32-bit timing representation in &nf. 2016-01-05 16:40:00 -08:00
Alan Mishchenko 19ad75f125 Migrating back to using 'float' in area-flow computation in &nf. 2016-01-05 14:05:07 -08:00
Alan Mishchenko 6642e40af5 Corner-case bug in 'read_profile'. 2015-12-22 22:09:25 -10:00
Alan Mishchenko 19586f105c Adding code to support gate profiles. 2015-12-14 00:44:33 -08:00
Alan Mishchenko e9abb0f489 Adding code to support gate profiles. 2015-12-07 01:31:41 -08:00
Alan Mishchenko 0f29ba75f6 Adding commands to read/write/print gate profiles. 2015-12-05 18:10:43 -08:00
Alan Mishchenko 3c9f7d2bc8 Extending and improving timing manager. 2015-11-08 19:59:34 -08:00
Alan Mishchenko efb8ad0af8 Extending and improving timing manager. 2015-11-08 12:08:50 -08:00
Alan Mishchenko 96d8f899d9 Extending and improving timing manager. 2015-11-08 11:44:37 -08:00
Alan Mishchenko 35143e830b Experiments with precomputation and matching. 2015-10-27 10:48:40 -07:00
Alan Mishchenko 9519341aaf Extending library handling to 8 inputs. 2015-10-25 20:23:44 -07:00
Alan Mishchenko 61d4623207 Adding switch in 'print_genlib' and 'write_genlib' to print area-min gates only. 2015-10-23 17:17:23 -07:00
Alan Mishchenko 3712dd30d0 Changes for delay-oriented computation. 2015-10-23 15:14:31 -07:00
Alan Mishchenko 15a86aefd2 Experiments with precomputation and matching. 2015-10-15 15:32:36 -07:00
Alan Mishchenko 20c46b5a45 Experiments with precomputation and matching. 2015-10-12 18:29:15 -07:00
Alan Mishchenko f1bc346894 Several bug-fixed related to synthesis, library handling, and timimg info. 2015-09-23 18:44:07 -07:00
Alan Mishchenko faeeaeb5e7 Updating Mio to use int instead of float. 2015-08-31 15:09:46 -07:00
Alan Mishchenko 04be8af560 Important bug fixes in standard-cell library handling and mapper &nf. 2015-08-28 17:47:00 -07:00
Alan Mishchenko c0f0e145c4 Improving the criteria to select representative gates in 'map' with floating-point-delay libraries having more than one gate in some functionality classes. 2015-04-25 14:58:29 -07:00
Alan Mishchenko a78fb767ee Adding platform-independent (alphabetic) way of sorting Genlib gates and selecting representatives based on area/delay. 2015-04-17 21:02:15 +09:00
Alan Mishchenko 3de5d18c5f Adding APIs to retrieve NOR/OR gates from the library. 2015-04-14 18:53:28 +09:00
Alan Mishchenko b3e5ccd256 Getting default AND-node delay from Genlib library. 2015-04-06 10:56:14 +07:00
Alan Mishchenko 68467cfff7 Fixed a typo in variable names. 2015-02-07 22:29:14 -08:00
Alan Mishchenko 77dbe2b656 Major rehash of the CBA code. 2015-01-31 19:52:32 -08:00
Alan Mishchenko 1398de7c46 Integrating barrier buffers. 2014-12-08 14:10:41 -08:00
Alan Mishchenko 3ac8aa9c12 Recommended changes for portability. 2014-10-12 09:10:27 -07:00
Alan Mishchenko ccb5bb34d7 Suggested patch for type-punned warnings 2014-10-10 08:58:18 -07:00
Alan Mishchenko 674dcf2a6e Generating abstraction of standard cell library. 2014-07-26 16:49:32 -07:00
Alan Mishchenko 704b4bad6b Generating abstraction of standard cell library. 2014-07-26 16:46:45 -07:00
Alan Mishchenko 7d81490fe6 Generating abstraction of standard cell library. 2014-07-25 20:02:56 -07:00
Alan Mishchenko 98da93093b Bug fix in technology mapper. 2013-11-24 09:51:48 -08:00
Alan Mishchenko 00efa68053 Several changes to allow Liberty files without delay info. 2013-11-21 12:58:13 -08:00
Alan Mishchenko 1692c1a57a Improvements to buffering and sizing. 2013-10-13 23:08:52 -07:00
Alan Mishchenko 805eb96d6d Integrating synthesis into the new BMC engine. 2013-10-02 23:03:17 -07:00
Alan Mishchenko e01174c6db Bug fixes in the library processing,. 2013-10-02 18:22:14 -07:00
Alan Mishchenko 7d3976a763 Unifying standard cell library representations. 2013-09-17 13:16:20 -07:00
Alan Mishchenko ff5d3591d1 Infrastructure to support full Liberty format and unitification of library representations. 2013-09-15 18:23:49 -07:00
Alan Mishchenko 4c6804c3ae Improved gate-sizing. 2013-07-29 10:10:21 -07:00
Alan Mishchenko 00d023713b Tuning standard-cell mapping flow. 2013-07-24 09:54:53 -07:00
Alan Mishchenko 9e384d5ca9 Small changes to the printout in timing analysis. 2013-07-19 11:35:03 -07:00
Alan Mishchenko 4c00829900 Modified SCL gate library to read/write gate formula. 2013-03-26 20:19:50 -07:00
Alan Mishchenko 7e598cd231 Fixing compilation problems on Linux-32 related to constants of type unsigned long long. 2013-01-30 16:15:53 +07:00