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2,743 Commits 27 Branches 57 Tags 58 MiB
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939 Commits

Author SHA1 Message Date
Alan Mishchenko ce74153c9f Tuning LUT mapping flow. 2014-08-27 22:59:21 -07:00
Alan Mishchenko 6db6607114 Improvements BLIF parser. 2014-08-27 18:47:45 -07:00
Alan Mishchenko 9c154cfe61 Improvements to DSD balancing. 2014-08-27 12:23:31 -07:00
Alan Mishchenko 66d9a80b3d Adding commands to save/load best network. 2014-08-26 21:28:26 -07:00
Alan Mishchenko 5c30eb10ef Improving GIA interfaces for some procedures. 2014-08-25 17:33:53 -07:00
Alan Mishchenko 47dde4e478 Correcting incorrect handling of timing in several &-commands. 2014-08-25 16:55:39 -07:00
Alan Mishchenko c344f3e38c Propagating timing support to the new synthesis/mapping commands. 2014-08-20 22:12:51 -07:00
Alan Mishchenko 6dbaa4d0f8 Extended command &cone to extract timing critical cones. 2014-08-19 23:30:17 -07:00
Alan Mishchenko 3ef00645b8 Added command 'sparsify' to derive ISF from CSF. 2014-08-18 22:42:48 -07:00
Alan Mishchenko 65f9b73505 Changing default CNF generation in &bmc. 2014-08-18 20:19:32 -07:00
Alan Mishchenko 7c8136c82d Added DSD-based collapsing &dsd. 2014-08-16 18:38:34 -07:00
Alan Mishchenko 06100279cd Added DSD-based collapsing &dsd. 2014-08-16 11:54:49 -07:00
Alan Mishchenko f907347484 Enabling circuit solver in &fraig. 2014-08-12 18:54:43 -07:00
Alan Mishchenko 9055265394 Bug fix in &fraig -L <num>. 2014-08-12 16:23:52 -07:00
Alan Mishchenko 99a917caf3 Bug fix in &fraig -L <num>. 2014-08-12 16:20:03 -07:00
Alan Mishchenko 68ce0bc1c1 Adding delay optimization to synthesis script &syn2. 2014-08-08 12:45:28 -07:00
Alan Mishchenko 35b816dd57 Enabling cofactoring in the mapper. 2014-08-06 14:18:20 -07:00
Alan Mishchenko 6a69a9139c Adding support for standard-cell mapping. 2014-07-28 11:31:31 -07:00
Alan Mishchenko 704b4bad6b Generating abstraction of standard cell library. 2014-07-26 16:46:45 -07:00
Alan Mishchenko 7d81490fe6 Generating abstraction of standard cell library. 2014-07-25 20:02:56 -07:00
Alan Mishchenko ba29267563 Small changes. 2014-07-21 22:43:08 -07:00
Alan Mishchenko c0aa9b6a5d Adding new command &sopb for resource-aware SOP balancing. 2014-07-21 13:49:25 -07:00
Alan Mishchenko ea73401db5 Updates and changes to several packages. 2014-07-20 22:11:00 -07:00
Alan Mishchenko 4a861d868c Small changes in several packages. 2014-07-17 09:47:07 -07:00
Alan Mishchenko c58b57e2b4 Improvements to profiling and printing statistics. 2014-07-09 20:22:51 -07:00
Alan Mishchenko b389f2054b Improvements to false path detection. 2014-07-08 23:51:20 -07:00
Alan Mishchenko afcec52a49 Improvements to representation of choices. 2014-07-01 13:05:09 -07:00
Alan Mishchenko 55404ca1af Changes and improvements to different packages. 2014-06-28 14:31:01 -07:00
Alan Mishchenko 933b749676 Changes and improvements to different packages. 2014-06-28 14:25:38 -07:00
Alan Mishchenko a68ec38df1 Changes and improvements to different packages. 2014-06-26 09:51:53 -07:00
Alan Mishchenko 2edf2a970e Improvements to power-aware mapping. 2014-06-23 18:05:51 -07:00
Alan Mishchenko 44d9c7e543 Improvements to CNF generation. 2014-06-23 13:11:59 -07:00
Alan Mishchenko f93e524421 Added command &mux_profile. 2014-06-22 17:08:21 -07:00
Alan Mishchenko 13dd4eeb59 Experiments with balancing. 2014-06-22 00:50:07 -07:00
Alan Mishchenko 1e76ebdf3b New tools for profiling verification miters. 2014-06-20 17:51:35 -07:00
Alan Mishchenko f98f610bab Added delay-oriented balancing to unmapping in &st. 2014-06-19 19:12:10 -07:00
Alan Mishchenko 85e23c8459 Various changes to enable better CNF generation. 2014-06-17 21:00:51 -07:00
Alan Mishchenko dd867b404a Added transformation of CEX after 'fix_aig' and checking of transformed CEXes using 'testcex -a'. 2014-06-17 12:21:48 -07:00
Alan Mishchenko e20364896e Bug fix in CEC generation after rarity simulation and few small changes. 2014-06-16 16:46:39 -07:00
Alan Mishchenko 2340d279bd Adding support of multi-output problems in &splitprove. 2014-06-15 22:58:25 -07:00
Alan Mishchenko e2637595f8 Updates and bug fixes. 2014-06-15 16:28:05 -07:00
Alan Mishchenko cf993a9d90 Adding more features to the synthesis script &syn2. 2014-06-14 19:03:05 -07:00
Alan Mishchenko 0ac22c9e1d Specializing some truth-table functions to 6 inputs. 2014-06-14 18:29:19 -07:00
Alan Mishchenko fcdd9148b4 Various modifications. 2014-06-12 21:27:14 -07:00
Alan Mishchenko 865f6fd43f Enabling switching activity. 2014-06-12 11:28:47 -07:00
Alan Mishchenko 082e5dc1b0 Integrating recent changes. 2014-06-12 11:08:54 -07:00
Alan Mishchenko 0d1a1c4624 Adding switch to &st to convert to larger gates. 2014-06-11 22:21:55 -07:00
Alan Mishchenko 93d89eaaeb Various modifications. 2014-06-10 21:31:10 -07:00
Alan Mishchenko 6ce9ac9bbd Skip 'scorr' when the network has no primary inputs. 2014-06-09 08:14:45 -07:00
Alan Mishchenko 3c6def2915 Adding print-out to &splitprove to see impact of cof variable on AIG size. 2014-06-07 13:14:23 -07:00