87816b3030
issue41 genclk master search
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-06-13 10:03:09 -07:00
8d65a6258d
read_spef rm -reduce_to
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-06-12 09:48:18 -07:00
6af5583baf
power ok
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-06-11 21:08:58 -07:00
fcbb1840ab
issue40 liberty multi-segment receiver capacitance
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-06-11 21:07:03 -07:00
113e917c01
rm pointless this->
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-06-11 20:50:11 -07:00
d9b28d03ca
Merge pull request #35 from antmicro/59336-fix-filtered-arrivals-race
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Guarded insertion into filtered_arrivals_ in sta::Search
2024-06-10 16:32:52 -07:00
1258bdc259
search/Search.cc: Added a mutex for insertion to filtered_arrivals
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Signed-off-by: Jan Bylicki <jbylicki@antmicro.com>
2024-06-10 17:21:24 +02:00
e81d3c5d9d
issue38 ccs_sim1
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-06-05 10:38:41 -07:00
b98f44c65f
gcc warning
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-06-04 12:19:10 -07:00
7358e2698e
unique_lock -> lock_guard
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-06-03 14:09:30 -07:00
6c1322b6ee
write_verilog -include_pwr_gnd
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-06-02 21:15:27 -07:00
a9106a190e
issue37 get_pins -hierarchical
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-06-02 21:08:39 -07:00
f24d907bf4
get_* -filter property==non_string_value
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-06-01 16:15:11 -07:00
89f82a825c
write_spice cap order
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-05-31 10:41:37 -07:00
14344c9969
ArcDcalcArg::ArcDcalcArg()
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-05-31 08:19:05 -07:00
6e87a618e7
write_spice
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-05-31 08:14:59 -07:00
49c713e493
issue34 get_property liberty_cell area
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-05-30 09:39:11 -07:00
e5e33ccb0d
issue33 set_assigned_transition output_pin incr dcalc
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-05-30 09:15:34 -07:00
2b0d0f9d23
write_verilog wire dcls respect -include_pwr_gnd
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-05-27 19:33:43 -07:00
8a6c4c6d88
set_logic_one/zero bidir loop
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-05-27 19:33:08 -07:00
20ae641fcb
report_clock_skew/latency
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-05-21 08:45:55 -07:00
73470f4033
reportClkSkew, reportClkLatency use ref for clks
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-05-20 15:48:00 -07:00
18b94651bb
Parallel `findClkSkew`
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Signed-off-by: Krzysztof Bieganski <kbieganski@antmicro.com>
2024-05-17 12:15:18 +02:00
f9618418d9
ccs_ceff, ccs_sim allow null drvr_pin, vdd check
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-05-13 19:15:13 -07:00
abacd6c89c
set_assigned_delay/check warn if no timing arc
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-05-13 12:21:20 -07:00
e448ed3dea
define_corners require at least 1 corner
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-05-12 16:00:03 -07:00
05e38d730a
report_clock_latency -include_internal_latency
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-05-11 18:12:55 -07:00
986260595f
report_clock_skew -include_internal_latency
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-05-09 18:06:44 -07:00
2ddd8900a9
report_clock_skews include uncertainty
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-05-09 16:56:23 -07:00
51596f8903
help with_output_to_variable
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-05-08 14:39:19 -07:00
1160c80837
help report_checks
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-05-08 14:25:29 -07:00
a2777782b0
PathEnd::clkSkew include source clk last wire delay
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-05-08 14:12:58 -07:00
fdca0dff7a
write_verilog use inout for power/ground
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-04-24 09:34:21 -07:00
22453cc8bf
Sta::netSlack use connectedPinIterator
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-04-24 08:38:25 -07:00
8ae487c602
write_timing_model leak
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-04-23 12:57:06 -07:00
1b5c4e2745
Merge pull request #26 from QuantamHD/fix_memory_leak
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Fixes memory leak in verilog attribute code.
2024-04-23 12:39:14 -07:00
7335731753
Fixes memory leak in verilog attribute code.
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There appears to be two leaks one with string handling, and
one with Dcl not freeing the attribute stmt list when it returns
nullptr.
Signed-off-by: Ethan Mahintorabi <ethanmoon@google.com>
2024-04-22 21:54:12 +00:00
d34cde34cd
ssta compile errors
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-04-21 11:59:10 -07:00
e158ded82e
CCS sim delay calc
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-04-19 17:27:21 -07:00
60d8030a94
liberty min_pulse_width timing group support
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-04-17 11:49:19 -07:00
4146e623d1
get_* -filter do not require spaces around ||/&&
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-04-13 22:59:36 -07:00
2182bf2713
delete_net doc
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-04-13 22:22:03 -07:00
b02532aea1
ClkLatency use Delay
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-04-13 21:28:06 -07:00
057a5dd283
compile warnings
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-04-13 21:18:39 -07:00
be82087bdf
write_timing_model ignore set_clock_latency -source
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-04-12 20:21:28 -07:00
e5774502c9
set_load after delete_pin issue21
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-04-04 13:29:50 -07:00
80598f8390
report_clock_skew after report_checks -through
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-04-03 19:26:39 -07:00
1d7bd5bafa
PathEndCheck::clkSkew
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-04-03 09:03:59 -07:00
b6cdea9566
verilog dup name
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-03-29 16:16:46 -07:00
01f1fc7642
verilog dup name
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Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-03-29 14:39:24 -07:00
James Cherry
Parallax Support
Jan Bylicki
Krzysztof Bieganski
James Cherry
Ethan Mahintorabi