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write_verilog -include_pwr_gnd 

Signed-off-by: James Cherry <cherry@parallaxsw.com>
This commit is contained in:
James Cherry 2024-06-02 21:15:27 -07:00
parent a9106a190e
commit 6c1322b6ee
1 changed files with 1 additions and 1 deletions
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2
verilog/VerilogWriter.cc
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@ -418,7 +418,7 @@ VerilogWriter::writeAssigns(Instance *inst)
&& (include_pwr_gnd_
|| !(network_->isPower(net) || network_->isGround(net)))
&& (network_->direction(port)->isAnyOutput()
|| network_->direction(port)->isPowerGround())
|| (include_pwr_gnd_ && network_->direction(port)->isPowerGround()))
&& !stringEqual(network_->name(port), network_->name(net))) {
// Port name is different from net name.
string port_vname = netVerilogName(network_->name(port),