2018-11-26 18:15:52 +01:00
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// OpenSTA, Static Timing Analyzer
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2024-01-12 01:34:49 +01:00
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// Copyright (c) 2024, Parallax Software, Inc.
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2018-11-26 18:15:52 +01:00
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//
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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2022-01-04 18:17:08 +01:00
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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2018-11-26 18:15:52 +01:00
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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2022-01-04 18:17:08 +01:00
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// along with this program. If not, see <https://www.gnu.org/licenses/>.
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2018-11-26 18:15:52 +01:00
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2020-02-16 01:13:16 +01:00
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#pragma once
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2018-11-26 18:15:52 +01:00
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2020-07-31 18:42:24 +02:00
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#include <utility>
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2023-11-10 17:59:50 +01:00
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#include "StaConfig.hh" // CUDD
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2020-07-31 18:42:24 +02:00
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#include "UnorderedMap.hh"
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#include "Network.hh"
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#include "SdcClass.hh"
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#include "PowerClass.hh"
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#include "StaState.hh"
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2018-11-26 18:15:52 +01:00
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2023-11-10 17:59:50 +01:00
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struct DdNode;
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struct DdManager;
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2018-11-26 18:15:52 +01:00
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namespace sta {
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2020-07-31 18:42:24 +02:00
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class Sta;
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class Corner;
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class DcalcAnalysisPt;
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2019-04-29 17:39:05 +02:00
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class PropActivityVisitor;
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class BfsFwdIterator;
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2021-10-28 17:38:23 +02:00
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class Vertex;
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2019-04-29 17:39:05 +02:00
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2020-07-30 16:55:48 +02:00
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typedef std::pair<const Instance*, LibertyPort*> SeqPin;
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2023-11-10 17:59:50 +01:00
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typedef Map<LibertyPort*, DdNode*> BddPortVarMap;
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typedef Map<unsigned, LibertyPort*> BddVarIdxPortMap;
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class SeqPinHash
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{
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public:
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SeqPinHash(const Network *network);
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size_t operator()(const SeqPin &pin) const;
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private:
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const Network *network_;
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};
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class SeqPinEqual
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{
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public:
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bool operator()(const SeqPin &pin1,
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const SeqPin &pin2) const;
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};
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2020-11-03 00:12:13 +01:00
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typedef UnorderedMap<const Pin*, PwrActivity> PwrActivityMap;
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typedef UnorderedMap<SeqPin, PwrActivity,
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SeqPinHash, SeqPinEqual> PwrSeqActivityMap;
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2018-11-26 18:15:52 +01:00
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// The Power class has access to Sta components directly for
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// convenience but also requires access to the Sta class member functions.
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class Power : public StaState
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{
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public:
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Power(StaState *sta);
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~Power();
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void power(const Corner *corner,
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// Return values.
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PowerResult &total,
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PowerResult &sequential,
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PowerResult &combinational,
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PowerResult &clock,
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PowerResult ¯o,
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PowerResult &pad);
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PowerResult power(const Instance *inst,
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const Corner *corner);
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void setGlobalActivity(float activity,
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float duty);
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void setInputActivity(float activity,
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float duty);
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void setInputPortActivity(const Port *input_port,
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float activity,
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float duty);
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PwrActivity &activity(const Pin *pin);
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void setUserActivity(const Pin *pin,
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float activity,
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float duty,
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PwrActivityOrigin origin);
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// Activity is toggles per second.
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PwrActivity findClkedActivity(const Pin *pin);
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protected:
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bool inClockNetwork(const Instance *inst);
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2023-01-20 03:01:54 +01:00
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void powerInside(const Instance *hinst,
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const Corner *corner,
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PowerResult &result);
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void ensureActivities();
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bool hasUserActivity(const Pin *pin);
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PwrActivity &userActivity(const Pin *pin);
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void setSeqActivity(const Instance *reg,
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LibertyPort *output,
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PwrActivity &activity);
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bool hasSeqActivity(const Instance *reg,
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LibertyPort *output);
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PwrActivity &seqActivity(const Instance *reg,
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LibertyPort *output);
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bool hasActivity(const Pin *pin);
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void setActivity(const Pin *pin,
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PwrActivity &activity);
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2019-04-29 17:39:05 +02:00
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PowerResult power(const Instance *inst,
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LibertyCell *cell,
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const Corner *corner);
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2023-10-25 19:33:28 +02:00
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void findInternalPower(const Instance *inst,
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LibertyCell *cell,
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const Corner *corner,
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const Clock *inst_clk,
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// Return values.
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PowerResult &result);
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2020-04-29 05:32:59 +02:00
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void findInputInternalPower(const Pin *to_pin,
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LibertyPort *to_port,
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const Instance *inst,
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LibertyCell *cell,
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PwrActivity &to_activity,
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float load_cap,
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const Corner *corner,
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// Return values.
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PowerResult &result);
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void findOutputInternalPower(const LibertyPort *to_port,
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const Instance *inst,
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LibertyCell *cell,
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PwrActivity &to_activity,
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float load_cap,
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const Corner *corner,
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// Return values.
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PowerResult &result);
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2018-11-26 18:15:52 +01:00
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void findLeakagePower(const Instance *inst,
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LibertyCell *cell,
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2020-11-11 19:31:47 +01:00
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const Corner *corner,
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2018-11-26 18:15:52 +01:00
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// Return values.
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PowerResult &result);
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2023-10-25 19:33:28 +02:00
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void findSwitchingPower(const Instance *inst,
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LibertyCell *cell,
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const Corner *corner,
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const Clock *inst_clk,
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// Return values.
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PowerResult &result);
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2021-10-28 17:38:23 +02:00
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float getSlew(Vertex *vertex,
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const RiseFall *rf,
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const Corner *corner);
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2019-04-20 23:07:00 +02:00
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const Clock *findInstClk(const Instance *inst);
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const Clock *findClk(const Pin *to_pin);
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2023-10-26 00:12:47 +02:00
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float clockDuty(const Clock *clk);
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2019-05-08 22:23:59 +02:00
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PwrActivity findClkedActivity(const Pin *pin,
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const Clock *inst_clk);
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PwrActivity findActivity(const Pin *pin);
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PwrActivity findSeqActivity(const Instance *inst,
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LibertyPort *port);
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2019-05-08 22:23:59 +02:00
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float portVoltage(LibertyCell *cell,
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const LibertyPort *port,
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const DcalcAnalysisPt *dcalc_ap);
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float pgNameVoltage(LibertyCell *cell,
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const char *pg_port_name,
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const DcalcAnalysisPt *dcalc_ap);
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void seedActivities(BfsFwdIterator &bfs);
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2019-05-01 03:17:36 +02:00
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void seedRegOutputActivities(const Instance *reg,
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2019-04-29 17:39:05 +02:00
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Sequential *seq,
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LibertyPort *output,
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bool invert);
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2019-05-01 03:17:36 +02:00
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void seedRegOutputActivities(const Instance *inst,
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BfsFwdIterator &bfs);
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2019-04-29 17:39:05 +02:00
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PwrActivity evalActivity(FuncExpr *expr,
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const Instance *inst);
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2020-05-03 01:12:25 +02:00
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PwrActivity evalActivity(FuncExpr *expr,
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const Instance *inst,
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const LibertyPort *cofactor_port,
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bool cofactor_positive);
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2020-05-02 03:40:50 +02:00
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LibertyPort *findExprOutPort(FuncExpr *expr);
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2023-11-10 17:59:50 +01:00
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float findInputDuty(const Instance *inst,
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2020-05-03 01:12:25 +02:00
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FuncExpr *func,
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InternalPower *pwr);
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2023-11-10 17:59:50 +01:00
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float evalDiffDuty(FuncExpr *expr,
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LibertyPort *from_port,
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const Instance *inst);
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2020-11-12 17:42:38 +01:00
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LibertyPort *findLinkPort(const LibertyCell *cell,
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const LibertyPort *corner_port);
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Pin *findLinkPin(const Instance *inst,
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const LibertyPort *corner_port);
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2022-12-02 02:17:57 +01:00
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void clockGatePins(const Instance *inst,
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// Return values.
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const Pin *&enable,
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const Pin *&clk,
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const Pin *&gclk) const;
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2018-11-26 18:15:52 +01:00
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2023-11-10 17:59:50 +01:00
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DdNode *funcBdd(const FuncExpr *expr);
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DdNode *ensureNode(LibertyPort *port);
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void clearVarMap();
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float evalBddActivity(DdNode *bdd,
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const Instance *inst);
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float evalBddDuty(DdNode *bdd,
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const Instance *inst);
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2018-11-26 18:15:52 +01:00
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private:
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2020-08-05 16:23:38 +02:00
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// Port/pin activities set by set_pin_activity.
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// set_pin_activity -global
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PwrActivity global_activity_;
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// set_pin_activity -input
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PwrActivity input_activity_;
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2020-08-05 16:23:38 +02:00
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// set_pin_activity -input_ports -pins
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PwrActivityMap user_activity_map_;
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// Propagated activities.
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PwrActivityMap activity_map_;
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2020-07-30 16:55:48 +02:00
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PwrSeqActivityMap seq_activity_map_;
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bool activities_valid_;
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DdManager *cudd_mgr_;
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BddPortVarMap bdd_port_var_map_;
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BddVarIdxPortMap bdd_var_idx_port_map_;
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2023-03-23 22:25:02 +01:00
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static constexpr int max_activity_passes_ = 100;
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friend class PropActivityVisitor;
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2018-11-26 18:15:52 +01:00
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};
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} // namespace
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