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bank.py
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Single bank passing.
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2020-06-25 14:03:59 -07:00 |
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bank_select.py
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Changes to simplify metal preferred directions and pitches.
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2020-05-10 11:32:45 -07:00 |
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bitcell_array.py
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Configured bitline directions into prot_data
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2020-04-20 14:23:40 -07:00 |
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bitcell_base_array.py
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Single bank passing.
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2020-06-25 14:03:59 -07:00 |
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col_cap_array.py
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PEP8 formatting
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2020-06-22 12:55:18 -07:00 |
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control_logic.py
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Permute bus order to avoid conflict in control_logic
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2020-06-15 10:25:53 -07:00 |
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delay_chain.py
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Fix power pin layer problems in delay line
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2020-06-24 10:26:49 -07:00 |
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dff_array.py
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add custom module file, make dff clk pin dynamic
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2020-02-04 23:35:06 -08:00 |
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dff_buf.py
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DRC and LVS fixes for pinv_dec
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2020-06-12 15:23:51 -07:00 |
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dff_buf_array.py
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Add supply rails to dff array. PEP8 cleanup.
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2020-04-21 15:21:29 -07:00 |
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dff_inv.py
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Clean up and generalize layer rules.
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2019-12-17 11:03:36 -08:00 |
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dff_inv_array.py
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Clean up and generalize layer rules.
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2019-12-17 11:03:36 -08:00 |
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dummy_array.py
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Auto-generate port dependent cell names.
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2020-06-05 15:09:22 -07:00 |
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hierarchical_decoder.py
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Single bank passing.
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2020-06-25 14:03:59 -07:00 |
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hierarchical_predecode.py
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Single bank passing.
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2020-06-25 14:03:59 -07:00 |
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hierarchical_predecode2x4.py
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Thin-cell decoder changes.
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2020-05-29 10:36:07 -07:00 |
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hierarchical_predecode3x8.py
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Thin-cell decoder changes.
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2020-05-29 10:36:07 -07:00 |
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hierarchical_predecode4x16.py
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Thin-cell decoder changes.
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2020-05-29 10:36:07 -07:00 |
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module_type.py
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Cleanup and rename vias.
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2020-01-30 01:45:33 +00:00 |
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multibank.py
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Cleanup and rename vias.
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2020-01-30 01:45:33 +00:00 |
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port_address.py
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Merge branch 'dev' into bisr
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2020-06-07 16:27:25 +00:00 |
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port_data.py
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Change s8 to sky130
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2020-06-12 14:23:26 -07:00 |
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precharge_array.py
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Bus code converted to pins. Fix layers on control signal routes in bank.
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2020-06-08 11:01:14 -07:00 |
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replica_bitcell_array.py
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Single bank passing.
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2020-06-25 14:03:59 -07:00 |
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replica_column.py
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Single bank passing.
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2020-06-25 14:03:59 -07:00 |
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row_cap_array.py
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PEP8 formatting
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2020-06-22 12:55:18 -07:00 |
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sense_amp.py
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sense_amp: Allow custom pin names
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2020-02-17 15:20:12 +01:00 |
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sense_amp_array.py
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Merge branch 'dev' into bisr
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2020-06-07 16:27:25 +00:00 |
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single_level_column_mux_array.py
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Update mirroring in port_data for bitcell mirrored arrays
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2020-06-05 11:29:31 -07:00 |
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tri_gate_array.py
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Clean up and generalize layer rules.
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2019-12-17 11:03:36 -08:00 |
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wordline_driver_array.py
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Change s8 to sky130
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2020-06-12 14:23:26 -07:00 |
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write_driver_array.py
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Change spare enable pins offset to lower right
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2020-06-08 14:31:46 +00:00 |
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write_mask_and_array.py
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added contact to locali for wmask
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2020-06-23 18:13:17 -07:00 |
f84ee04fa9