OpenRAM/compiler/sram
mrg 958f5e45bb Add extra dnwell spacing for single port 2021-06-23 11:14:58 -07:00
..
sram.py Finalize uniquify option for SRAMs 2021-06-22 16:13:33 -07:00
sram_1bank.py Add extra dnwell spacing for single port 2021-06-23 11:14:58 -07:00
sram_2bank.py Update copyright year. 2021-01-22 11:23:28 -08:00
sram_base.py Merge branch 'dev' into automated_analytical_model 2021-06-22 01:39:38 -07:00
sram_config.py Remove print statement 2021-06-21 15:16:36 -07:00