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OpenRAM
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mrg cf63499e76 Convert bitcells to 1port and 2port 2020-11-13 08:09:21 -08:00
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gds_lib Convert bitcells to 1port and 2port 2020-11-13 08:09:21 -08:00
sp_lib Convert bitcells to 1port and 2port 2020-11-13 08:09:21 -08:00
tech Convert bitcells to 1port and 2port 2020-11-13 08:09:21 -08:00
tf Add comment layer to display.drf so it is included in .lyp file. 2019-08-27 08:51:34 -07:00
__init__.py Remove EOL whitespace globally 2020-11-03 06:29:17 -08:00
layers.map RELEASE 1.0 2016-11-08 09:57:35 -08:00