Eren Dogan e718106d87 Change is_unit_test to False by default

2022-11-21 14:52:57 -08:00

..

base

Further fixes for new verilog naming convention

2022-08-18 11:03:13 -07:00

characterizer

Merge branch 'dev' into multibank

2022-08-12 21:45:26 -07:00

datasheet

Remove line ending whitespace

2022-07-22 19:52:38 +03:00

drc

Fix whitespace

2022-10-20 16:38:23 -07:00

gdsMill

Add technology parameter for library prefix during uniquification of GDS

2021-07-12 11:01:51 -07:00

model_configs

Added shared config which is imported in all model configs. Shared config only hold model type for now.

2021-09-15 13:00:51 -07:00

modules

Fix whitespace

2022-10-20 16:38:23 -07:00

router

Fix print errors in code format unit test.

2022-07-26 12:20:15 -07:00

tests

Change is_unit_test to False by default

2022-11-21 14:52:57 -08:00

verify

add flatglob to tech file; sky130 replica col lvs working

2022-08-22 15:30:11 -07:00

debug.py

Change compiler name for unit tests

2022-11-06 14:05:08 -08:00

gen_stimulus.py

…

globals.py

Change is_unit_test to False by default

2022-11-21 14:52:57 -08:00

Makefile

Change compiler name for unit tests

2022-11-06 14:05:08 -08:00

model_data_util.py

Remove line ending whitespace

2022-07-22 19:52:38 +03:00

options.py

Change compiler name for unit tests

2022-11-06 14:05:08 -08:00

printGDS.py

Remove line ending whitespace

2022-07-22 19:52:38 +03:00

processGDS.py

Remove line ending whitespace

2022-07-22 19:52:38 +03:00

run_profile.sh

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sram_factory.py

Use packages for imports.

2022-07-13 15:55:57 -07:00

uniquifyGDS.py

Add technology parameter for library prefix during uniquification of GDS

2021-07-12 11:01:51 -07:00

view_profile.py

…