Matt Guthaus 31825d9d77 Fix magicrc for multiple openram tech paths

2019-10-24 13:17:33 -07:00

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.magicrc

Fix magicrc for multiple openram tech paths

2019-10-24 13:17:33 -07:00

cell_1rw_1r.mag

Replaced bb layer with comment layer in 1rw,1r cell. Changed widths in replica cell.

2018-11-14 11:00:37 -08:00

cell_1w_1r.mag

Add back scn3me_subm support

2019-06-03 15:27:37 -07:00

cell_6t.ext

Copy 1rw/1r cell to 1w/1r.

2019-02-24 09:54:45 -08:00

cell_6t.mag

Replica bitcell array working

2019-06-19 16:03:21 -07:00

cell_6t.spice

Copy 1rw/1r cell to 1w/1r.

2019-02-24 09:54:45 -08:00

convertall.sh

Added scn4m_subm.

2018-09-13 12:53:35 -07:00

dff.mag

Added scn4m_subm.

2018-09-13 12:53:35 -07:00

dummy_cell_1rw_1r.mag

Add other SCMOS dummy cells

2019-07-03 14:28:12 -07:00

dummy_cell_1w_1r.mag

Add other SCMOS dummy cells

2019-07-03 14:28:12 -07:00

dummy_cell_6t.mag

Replica bitcell array working

2019-06-19 16:03:21 -07:00

replica_cell_1rw_1r.mag

Replaced bb layer with comment layer in 1rw,1r cell. Changed widths in replica cell.

2018-11-14 11:00:37 -08:00

replica_cell_1w_1r.mag

Add back scn3me_subm support

2019-06-03 15:27:37 -07:00

replica_cell_6t.ext

Copy 1rw/1r cell to 1w/1r.

2019-02-24 09:54:45 -08:00

replica_cell_6t.mag

Replica bitcell array working

2019-06-19 16:03:21 -07:00

replica_cell_6t.spice

Copy 1rw/1r cell to 1w/1r.

2019-02-24 09:54:45 -08:00

sense_amp.mag

Added scn4m_subm.

2018-09-13 12:53:35 -07:00

setup.tcl

Flatten bitcell array for LVS symmetries.

2019-07-16 11:53:20 -07:00

tri_gate.mag

Added scn4m_subm.

2018-09-13 12:53:35 -07:00

write_driver.mag

Added way to determine length of en pin with wmask in write_driver_array and shortened en to width of driver.

2019-08-08 15:49:23 -07:00