Flatten bitcell array for LVS symmetries.

This commit is contained in:
mrg 2019-07-16 11:53:20 -07:00
parent bea07c2319
commit f5804e1cbf
1 changed files with 1 additions and 0 deletions

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@ -6,6 +6,7 @@ equate class {-circuit1 pfet} {-circuit2 p}
flatten class {-circuit1 dummy_cell_6t}
flatten class {-circuit1 dummy_cell_1rw_1r}
flatten class {-circuit1 dummy_cell_1w_1r}
flatten class {-circuit1 bitcell_array_0}
flatten class {-circuit1 pbitcell_0}
flatten class {-circuit1 pbitcell_1}
property {-circuit1 nfet} remove as ad ps pd