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a128e0501ec7fe29e9dd438c0e32af80e617463f
OpenRAM/compiler
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mrg a128e0501e Use cell_name in col and row caps too.
2020-11-03 12:10:18 -08:00
..
base
Use custom cells when needed.
2020-11-03 11:58:25 -08:00
bitcells
Use cell_name in col and row caps too.
2020-11-03 12:10:18 -08:00
characterizer
Remove EOL whitespace globally
2020-11-03 06:29:17 -08:00
custom
Use custom cells when needed.
2020-11-03 11:58:25 -08:00
datasheet
Remove EOL whitespace globally
2020-11-03 06:29:17 -08:00
drc
Remove EOL whitespace globally
2020-11-03 06:29:17 -08:00
example_configs
Fixed nominal_corner_only parameter.
2020-10-30 15:52:07 -07:00
gdsMill
Remove EOL whitespace globally
2020-11-03 06:29:17 -08:00
modules
Use custom cells when needed.
2020-11-03 11:58:25 -08:00
pgates
Remove EOL whitespace globally
2020-11-03 06:29:17 -08:00
riscv
single port progess
2020-09-14 18:11:38 -07:00
router
Remove EOL whitespace globally
2020-11-03 06:29:17 -08:00
sram
Remove EOL whitespace globally
2020-11-03 06:29:17 -08:00
tests
Fix bitcell and pbitcell with different cell names
2020-11-03 11:30:40 -08:00
verify
Remove EOL whitespace globally
2020-11-03 06:29:17 -08:00
debug.py
DRC/LVS and errors fixes.
2020-06-30 07:16:05 -07:00
gen_stimulus.py
Fixed errors in extra rows characterization
2020-03-22 20:54:49 +00:00
globals.py
Fix bitcell and pbitcell with different cell names
2020-11-03 11:30:40 -08:00
Makefile
…
openram.py
Remove EOL whitespace globally
2020-11-03 06:29:17 -08:00
options.py
Remove EOL whitespace globally
2020-11-03 06:29:17 -08:00
run_profile.sh
Convert pin map to a set for faster membership.
2019-04-01 15:45:44 -07:00
sram_factory.py
Remove EOL whitespace globally
2020-11-03 06:29:17 -08:00
view_profile.py
Remove some flake8 errors/warnings.
2019-10-02 23:26:02 +00:00